[PATCH RFC 0/8] arm64: dts: qcom: Introduce SM8650 platforms device tree

[Neil Armstrong <neil.armstrong@linaro.org>]

This introduces the Device Tree for the recently announced Snapdragon 8 Gen 3
from Qualcomm, you can find the marketing specifications at:
https://docs.qualcomm.com/bundle/publicresource/87-71408-1_REV_B_Snapdragon_8_gen_3_Mobile_Platform_Product_Brief.pdf

Bindings and base Device Tree for the SM8650 SoC, MTP (Mobile Test Platform)
and QRD (Qualcommm Reference Device) are splited in two:
- 1-5: boot-to-shell first set that are only build-dependent on Clock bindings
- 6-8: multimedia second set that are build-dependent with Interconnect bindings

Features added and enabled:
- CPUs with CPUFREQ, SCPI idle states
- QICv3, IOMMU, Timers
- Interconnect NoCs with LLCC/CPU BWMONs
- SoC 3xTemperature Sensors
- Pinctrl/GPIO with PDC wakeup support
- Global, GPU, Display, TCSR Clock Controllers
- cDSP, aDSP and MPSS with SMP2P
- QuP/I2C Master Hub I2C and SPI controllers + GPI DMA
- PCIe 0/1
- USB2/USB3 with USB3/DP Combo PHY
- UFS with Inline Crypto Engine
- Crypto Engine + DMA and True Random Generator
- SDHCI
- Mobile Display Subsystem with 2xDSI output
- PMIC Glink (USB-PD UCSI + Altmode) provided by aDSP firmware
- GPIO and PMIC Buttons/LEDs on QRD board
- WCN7850 Bluetooth
- DSI + Touch panel

Bindings Dependencies:
- aoss-qmp: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-aoss-qmp-v1-1-8940621d704c@linaro.org/
- bwmon: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-bwmon-v1-1-11efcdd8799e@linaro.org/
- cpufreq: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-cpufreq-v1-1-31dec4887d14@linaro.org/
- dwc3: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-dwc3-v1-1-fdd447e99865@linaro.org/
- gpi: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-gpi-v1-1-3e8824ae480c@linaro.org/
- ice: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-ice-v1-1-6b2bc14e71db@linaro.org/
- ipcc: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-ipcc-v1-1-acca4318d06e@linaro.org/
- pcie: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pcie-v1-1-0e3d6f0c5827@linaro.org/
- pcd: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pdc-v1-1-42f62cc9858c@linaro.org/
- pmic-glink: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pmic-glink-v1-1-0c2829a62565@linaro.org/
- qce: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-qce-v1-1-7e30dba20dbf@linaro.org/
- rng: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-rng-v1-1-6b6a020e3441@linaro.org/
- scm: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-scm-v1-1-f687b5aa3c9e@linaro.org/
- sdhci: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-sdhci-v1-1-e644cf937321@linaro.org/
- smmu: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-smmu-v1-1-bfa25faa061e@linaro.org/
- tsens: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-tsens-v1-1-09fdd17b1116@linaro.org/
- ufs: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-ufs-v1-1-a355e3556531@linaro.org/
- clocks: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-clocks-v1-0-c89b59594caf@linaro.org/
- interconnect: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-interconnect-v1-0-b7277e03aa3d@linaro.org/
- llcc: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-llcc-v1-0-ba4566225424@linaro.org/
- mdss: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-mdss-v1-0-bb219b8c7a51@linaro.org/
- phy: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-phy-v1-0-6137101520c4@linaro.org/
- remoteproc: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-remoteproc-v1-0-a8d20e4ce18c@linaro.org/
- rpmpd: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-rpmpd-v1-0-f25d313104c6@linaro.org/
- tlmm: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-tlmm-v1-0-4e3d84a3a46b@linaro.org/
- goodix: https://lore.kernel.org/all/20231023-topic-goodix-berlin-upstream-initial-v10-0-88eec2e51c0b@linaro.org/

Build Dependencies:
- clocks: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-clocks-v1-0-c89b59594caf@linaro.org/
- interconnect: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-interconnect-v1-0-b7277e03aa3d@linaro.org/

Other:
- socinfo: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-socinfo-v1-1-6776a5183fa0@linaro.org/

Merge Strategy:
- Merge patches 1-5 with Clock bindings immutable branch
- Merge patches 6-8 with Interconnect immutable branch

For convenience, a regularly refreshed linux-next based git tree containing
all the SM8650 related work is available at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm85650/upstream/integ

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Neil Armstrong (8):
      dt-bindings: arm: qcom: document SM8650 and the reference boards
      arm64: dts: qcom: add initial SM8650 dtsi
      arm64: dts: qcom: pm8550ve: make PMK8550VE SID configurable
      arm64: dts: qcom: sm8650: add initial SM8650 MTP dts
      arm64: dts: qcom: sm8650: add initial SM8650 QRD dts
      arm64: dts: qcom: sm8650: add interconnect dependent device nodes
      arm64: dts: qcom: sm8650-mtp: add interconnect dependent device nodes
      arm64: dts: qcom: sm8650-qrd: add interconnect dependent device nodes

 Documentation/devicetree/bindings/arm/qcom.yaml |    7 +
 arch/arm64/boot/dts/qcom/Makefile               |    2 +
 arch/arm64/boot/dts/qcom/pm8550ve.dtsi          |   11 +-
 arch/arm64/boot/dts/qcom/sm8650-mtp.dts         |  615 +++
 arch/arm64/boot/dts/qcom/sm8650-qrd.dts         |  743 +++
 arch/arm64/boot/dts/qcom/sm8650.dtsi            | 5483 +++++++++++++++++++++++
 6 files changed, 6858 insertions(+), 3 deletions(-)
---
base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc
change-id: 20231016-topic-sm8650-upstream-dt-ee696999df62

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>