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From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, Daniel Henrique Barboza <danielhb413@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v4 17/21] ppc4xx_sdram: Use hwaddr for memory bank size
Date: Wed, 14 Sep 2022 13:34:31 +0200 (CEST)	[thread overview]
Message-ID: <5dfcb21d9e6daa8193f02495e612cbf5b66cef1e.1663154398.git.balaton@eik.bme.hu> (raw)
In-Reply-To: <cover.1663154398.git.balaton@eik.bme.hu>

This resolves the target_ulong dependency that's clearly wrong and was
also noted in a fixme comment.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/ppc/ppc4xx_sdram.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index 39c27fa7d3..a6b80281b3 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -34,7 +34,6 @@
 #include "qapi/error.h"
 #include "qemu/log.h"
 #include "exec/address-spaces.h" /* get_system_memory() */
-#include "exec/cpu-defs.h" /* target_ulong */
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
 #include "qapi/error.h"
@@ -122,11 +121,6 @@ static void sdram_bank_unmap(Ppc4xxSdramBank *bank)
 
 /*****************************************************************************/
 /* DDR SDRAM controller */
-/*
- * XXX: TOFIX: some patches have made this code become inconsistent:
- *      there are type inconsistencies, mixing hwaddr, target_ulong
- *      and uint32_t
- */
 static uint32_t sdram_ddr_bcr(hwaddr ram_base, hwaddr ram_size)
 {
     uint32_t bcr;
@@ -170,9 +164,9 @@ static inline hwaddr sdram_ddr_base(uint32_t bcr)
     return bcr & 0xFF800000;
 }
 
-static target_ulong sdram_ddr_size(uint32_t bcr)
+static hwaddr sdram_ddr_size(uint32_t bcr)
 {
-    target_ulong size;
+    hwaddr size;
     int sh;
 
     sh = (bcr >> 17) & 0x7;
@@ -513,9 +507,9 @@ static inline hwaddr sdram_ddr2_base(uint32_t bcr)
     return (bcr & 0xffe00000) << 2;
 }
 
-static uint64_t sdram_ddr2_size(uint32_t bcr)
+static hwaddr sdram_ddr2_size(uint32_t bcr)
 {
-    uint64_t size;
+    hwaddr size;
     int sh;
 
     sh = 1024 - ((bcr >> 6) & 0x3ff);
-- 
2.30.4



  parent reply	other threads:[~2022-09-14 11:59 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-14 11:34 [PATCH v4 00/21] ppc4xx_sdram QOMify and clean ups BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 01/21] ppc440_bamboo: Remove unnecessary memsets BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 02/21] ppc4xx: Introduce Ppc4xxSdramBank struct BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 03/21] ppc4xx_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 04/21] ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks() BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 05/21] ppc440_bamboo: Add missing 4 MiB valid memory size BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 06/21] ppc4xx_sdram: Move size check to ppc4xx_sdram_init() BALATON Zoltan
2022-09-17 21:54   ` Philippe Mathieu-Daudé via
2022-09-14 11:34 ` [PATCH v4 07/21] ppc4xx_sdram: QOM'ify BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 08/21] ppc4xx_sdram: Drop extra zeros for readability BALATON Zoltan
2022-09-17 22:12   ` Philippe Mathieu-Daudé via
2022-09-14 11:34 ` [PATCH v4 09/21] ppc440_sdram: Split off map/unmap of sdram banks for later reuse BALATON Zoltan
2022-09-17 22:14   ` Philippe Mathieu-Daudé via
2022-09-14 11:34 ` [PATCH v4 10/21] ppc440_sdram: Implement enable bit in the DDR2 SDRAM BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 11/21] ppc440_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 12/21] ppc440_sdram: Rename local variable for readability BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 13/21] ppc4xx_sdram: Rename functions to prevent name clashes BALATON Zoltan
2022-09-17 22:15   ` Philippe Mathieu-Daudé via
2022-09-14 11:34 ` [PATCH v4 14/21] ppc440_sdram: Move RAM size check to ppc440_sdram_init BALATON Zoltan
2022-09-17 22:16   ` Philippe Mathieu-Daudé via
2022-09-18  9:59     ` BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 15/21] ppc440_sdram: QOM'ify BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 16/21] ppc4xx_sdram: Move ppc4xx DDR and DDR2 SDRAM controller models together BALATON Zoltan
2022-09-14 11:34 ` BALATON Zoltan [this message]
2022-09-14 11:34 ` [PATCH v4 18/21] ppc4xx_sdram: Rename local state variable for brevity BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 19/21] ppc4xx_sdram: Generalise bank setup BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 20/21] ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling BALATON Zoltan
2022-09-14 11:34 ` [PATCH v4 21/21] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks() BALATON Zoltan
2022-09-17 22:18   ` Philippe Mathieu-Daudé via

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