* [PATCH 0/3] Add support for the Mercury+ AA1 module [not found] <20210920124138.7Rv4Bat-mDXSJL5_d7ykDRJFDCAMP3dSiZm0nDPMaDU@z> @ 2021-09-20 12:41 ` Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel ` (3 more replies) 0 siblings, 4 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel The following patches add support for the Mercury+ AA1 with an Arria 10 SoCFPGA, namely a device tree, and a fix regarding the Arria 10 reset manager driver. Paweł Anikiel (3): dt-bindings: mtd: spi-nor: add n25q00 schema dts: socfpga: Add Mercury+ AA1 devicetree reset: socfpga: add empty driver allowing consumers to probe .../bindings/mtd/jedec,spi-nor.yaml | 2 +- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ drivers/reset/reset-socfpga.c | 26 ++++ 4 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 0/3] Add support for the Mercury+ AA1 module 2021-09-20 12:41 ` [PATCH 0/3] Add support for the Mercury+ AA1 module Paweł Anikiel @ 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210920124139.jQM-Tqzr63A2Hs1WHPqhhGaUuJiNYaCWKRl5YiR4iTA@z> ` (2 subsequent siblings) 3 siblings, 0 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel The following patches add support for the Mercury+ AA1 with an Arria 10 SoCFPGA, namely a device tree, and a fix regarding the Arria 10 reset manager driver. Paweł Anikiel (3): dt-bindings: mtd: spi-nor: add n25q00 schema dts: socfpga: Add Mercury+ AA1 devicetree reset: socfpga: add empty driver allowing consumers to probe .../bindings/mtd/jedec,spi-nor.yaml | 2 +- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ drivers/reset/reset-socfpga.c | 26 ++++ 4 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <20210920124139.jQM-Tqzr63A2Hs1WHPqhhGaUuJiNYaCWKRl5YiR4iTA@z>]
* [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema [not found] ` <20210920124139.jQM-Tqzr63A2Hs1WHPqhhGaUuJiNYaCWKRl5YiR4iTA@z> @ 2021-09-20 12:41 ` Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel ` (2 more replies) 0 siblings, 3 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel Add schema for the n25q00 NOR flash memory. Signed-off-by: Paweł Anikiel <pan@semihalf.com> --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index ed590d7c6e37..efb3c5e05c5a 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -18,7 +18,7 @@ properties: - items: - pattern: "^((((micron|spansion|st),)?\ (m25p(40|80|16|32|64|128)|\ - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ atmel,at25df(321a|641|081a)|\ everspin,mr25h(10|40|128|256)|\ (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema 2021-09-20 12:41 ` [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema Paweł Anikiel @ 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210923165648.FCg577uaG9fWz1MINUjzq_6XdotxOakHUOjndV9cMBM@z> [not found] ` <20210923185904.twJ5GB7t8omyZ7RKqA5bcaS2QzsOxfghoI6XXJrCzfc@z> 2 siblings, 0 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel Add schema for the n25q00 NOR flash memory. Signed-off-by: Paweł Anikiel <pan@semihalf.com> --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index ed590d7c6e37..efb3c5e05c5a 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -18,7 +18,7 @@ properties: - items: - pattern: "^((((micron|spansion|st),)?\ (m25p(40|80|16|32|64|128)|\ - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ atmel,at25df(321a|641|081a)|\ everspin,mr25h(10|40|128|256)|\ (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply related [flat|nested] 25+ messages in thread
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* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema [not found] ` <20210923165648.FCg577uaG9fWz1MINUjzq_6XdotxOakHUOjndV9cMBM@z> @ 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring 0 siblings, 1 reply; 25+ messages in thread From: Rob Herring @ 2021-09-23 16:56 UTC (permalink / raw) To: Paweł Anikiel Cc: linux-mtd, olof, ka, dinguyen, devicetree, miquel.raynal, richard, jam, soc, linux-arm-kernel, tn, p.zabel, linux-kernel, arnd, vigneshr, robh+dt On Mon, 20 Sep 2021 14:41:39 +0200, Paweł Anikiel wrote: > Add schema for the n25q00 NOR flash memory. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema 2021-09-23 16:56 ` Rob Herring @ 2021-09-23 16:56 ` Rob Herring 0 siblings, 0 replies; 25+ messages in thread From: Rob Herring @ 2021-09-23 16:56 UTC (permalink / raw) To: Paweł Anikiel Cc: linux-mtd, olof, ka, dinguyen, devicetree, miquel.raynal, richard, jam, soc, linux-arm-kernel, tn, p.zabel, linux-kernel, arnd, vigneshr, robh+dt On Mon, 20 Sep 2021 14:41:39 +0200, Paweł Anikiel wrote: > Add schema for the n25q00 NOR flash memory. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org> ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
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* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema [not found] ` <20210923185904.twJ5GB7t8omyZ7RKqA5bcaS2QzsOxfghoI6XXJrCzfc@z> @ 2021-09-23 18:59 ` Pratyush Yadav 2021-09-23 18:59 ` Pratyush Yadav [not found] ` <20211005115906.sVeqCk7Lbj-UbEQBqo8aQDAVjC_bmmDQ6QaO3ChH2n4@z> 0 siblings, 2 replies; 25+ messages in thread From: Pratyush Yadav @ 2021-09-23 18:59 UTC (permalink / raw) To: Paweł Anikiel Cc: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Tudor Ambarus +Tudor On 20/09/21 02:41PM, Paweł Anikiel wrote: > Add schema for the n25q00 NOR flash memory. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > index ed590d7c6e37..efb3c5e05c5a 100644 > --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > @@ -18,7 +18,7 @@ properties: > - items: > - pattern: "^((((micron|spansion|st),)?\ > (m25p(40|80|16|32|64|128)|\ > - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ > + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ IIUC this is supposed to only be for legacy/old flashes that started out using flash-specific compatibles. Any new flashes should simply use jedec,spi-nor unless there is a legitimate reason to do so. Until you justify that reason, Nacked-by: Pratyush Yadav <p.yadav@ti.com> > atmel,at25df(321a|641|081a)|\ > everspin,mr25h(10|40|128|256)|\ > (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ > -- > 2.25.1 -- Regards, Pratyush Yadav Texas Instruments Inc. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema 2021-09-23 18:59 ` Pratyush Yadav @ 2021-09-23 18:59 ` Pratyush Yadav [not found] ` <20211005115906.sVeqCk7Lbj-UbEQBqo8aQDAVjC_bmmDQ6QaO3ChH2n4@z> 1 sibling, 0 replies; 25+ messages in thread From: Pratyush Yadav @ 2021-09-23 18:59 UTC (permalink / raw) To: Paweł Anikiel Cc: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Tudor Ambarus +Tudor On 20/09/21 02:41PM, Paweł Anikiel wrote: > Add schema for the n25q00 NOR flash memory. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > index ed590d7c6e37..efb3c5e05c5a 100644 > --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml > @@ -18,7 +18,7 @@ properties: > - items: > - pattern: "^((((micron|spansion|st),)?\ > (m25p(40|80|16|32|64|128)|\ > - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ > + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ IIUC this is supposed to only be for legacy/old flashes that started out using flash-specific compatibles. Any new flashes should simply use jedec,spi-nor unless there is a legitimate reason to do so. Until you justify that reason, Nacked-by: Pratyush Yadav <p.yadav@ti.com> > atmel,at25df(321a|641|081a)|\ > everspin,mr25h(10|40|128|256)|\ > (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ > -- > 2.25.1 -- Regards, Pratyush Yadav Texas Instruments Inc. ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
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* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema [not found] ` <20211005115906.sVeqCk7Lbj-UbEQBqo8aQDAVjC_bmmDQ6QaO3ChH2n4@z> @ 2021-10-05 11:59 ` Tudor.Ambarus 2021-10-05 11:59 ` Tudor.Ambarus 0 siblings, 1 reply; 25+ messages in thread From: Tudor.Ambarus @ 2021-10-05 11:59 UTC (permalink / raw) To: p.yadav, pan Cc: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam On 9/23/21 9:59 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > +Tudor > > On 20/09/21 02:41PM, Paweł Anikiel wrote: >> Add schema for the n25q00 NOR flash memory. >> >> Signed-off-by: Paweł Anikiel <pan@semihalf.com> >> --- >> Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> index ed590d7c6e37..efb3c5e05c5a 100644 >> --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> @@ -18,7 +18,7 @@ properties: >> - items: >> - pattern: "^((((micron|spansion|st),)?\ >> (m25p(40|80|16|32|64|128)|\ >> - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ >> + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ > > IIUC this is supposed to only be for legacy/old flashes that started out > using flash-specific compatibles. Any new flashes should simply use > jedec,spi-nor unless there is a legitimate reason to do so. that's correct, the generic compatible should suffice for these flashes. > > Until you justify that reason, > > Nacked-by: Pratyush Yadav <p.yadav@ti.com> I agree. Cheers, ta ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema 2021-10-05 11:59 ` Tudor.Ambarus @ 2021-10-05 11:59 ` Tudor.Ambarus 0 siblings, 0 replies; 25+ messages in thread From: Tudor.Ambarus @ 2021-10-05 11:59 UTC (permalink / raw) To: p.yadav, pan Cc: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam On 9/23/21 9:59 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > +Tudor > > On 20/09/21 02:41PM, Paweł Anikiel wrote: >> Add schema for the n25q00 NOR flash memory. >> >> Signed-off-by: Paweł Anikiel <pan@semihalf.com> >> --- >> Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> index ed590d7c6e37..efb3c5e05c5a 100644 >> --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml >> @@ -18,7 +18,7 @@ properties: >> - items: >> - pattern: "^((((micron|spansion|st),)?\ >> (m25p(40|80|16|32|64|128)|\ >> - n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ >> + n25q(00|32b|064|128a11|128a13|256a|512a|164k)))|\ > > IIUC this is supposed to only be for legacy/old flashes that started out > using flash-specific compatibles. Any new flashes should simply use > jedec,spi-nor unless there is a legitimate reason to do so. that's correct, the generic compatible should suffice for these flashes. > > Until you justify that reason, > > Nacked-by: Pratyush Yadav <p.yadav@ti.com> I agree. Cheers, ta _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <20210920124140.RZTw5kTlMXDVKDMnzhD0FZ5oHIQ_cZ6kTSSrKdQw9WU@z>]
* [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree [not found] ` <20210920124140.RZTw5kTlMXDVKDMnzhD0FZ5oHIQ_cZ6kTSSrKdQw9WU@z> @ 2021-09-20 12:41 ` Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel 0 siblings, 1 reply; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel, Joanna Brozek, Mariusz Glebocki, Tomasz Gorochowik, Maciej Mikunda Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724..0a7809eb3795 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ + socfpga_arria10_mercury_aa1.dtb \ socfpga_cyclone5_chameleon96.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_socdk.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts new file mode 100644 index 000000000000..c13f16afa72f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "socfpga_arria10.dtsi" + +/ { + + model = "Enclustra Mercury AA1"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial1 = &uart1; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&osc1 { + clock-frequency = <33330000>; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +/* Following mappings are taken from arria10 socdk dts */ +&mmc { + status = "okay"; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + max-frame-size = <3800>; + status = "okay"; + + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy3: ethernet-phy@3 { + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + reg = <3>; + }; + }; +}; + +&i2c1 { + status = "okay"; + isl12022: isl12022@6f { + status = "okay"; + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&qspi { + status = "disabled"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; + spi-max-frequency = <50000000>; + cdns,page-size = <256>; + cdns,block-size = <16>; + m25p,fast-read; + cdns,read-delay = <4>; + cdns,tshsl-ns = <200>; + cdns,tsd2d-ns = <255>; + cdns,tchsh-ns = <20>; + cdns,tslch-ns = <20>; + + part0: qspi-boot@0 { + label = "Flash 0 Raw Data"; + reg = <0x0 0x01340000>; + }; + part1: qspi-rootfs@1320000 { + label = "Flash 1 jffs2 Filesystem"; + reg = <0x01340000 0x2cc0000>; + }; + }; +}; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree 2021-09-20 12:41 ` [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree Paweł Anikiel @ 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210923165624.wCIpZMuEaOTqgzTIVio-auukBwIkYM1Ik1HRSlI8hTg@z> 0 siblings, 1 reply; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel, Joanna Brozek, Mariusz Glebocki, Tomasz Gorochowik, Maciej Mikunda Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724..0a7809eb3795 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ + socfpga_arria10_mercury_aa1.dtb \ socfpga_cyclone5_chameleon96.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_socdk.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts new file mode 100644 index 000000000000..c13f16afa72f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "socfpga_arria10.dtsi" + +/ { + + model = "Enclustra Mercury AA1"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial1 = &uart1; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&osc1 { + clock-frequency = <33330000>; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +/* Following mappings are taken from arria10 socdk dts */ +&mmc { + status = "okay"; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + max-frame-size = <3800>; + status = "okay"; + + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy3: ethernet-phy@3 { + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + reg = <3>; + }; + }; +}; + +&i2c1 { + status = "okay"; + isl12022: isl12022@6f { + status = "okay"; + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&qspi { + status = "disabled"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; + spi-max-frequency = <50000000>; + cdns,page-size = <256>; + cdns,block-size = <16>; + m25p,fast-read; + cdns,read-delay = <4>; + cdns,tshsl-ns = <200>; + cdns,tsd2d-ns = <255>; + cdns,tchsh-ns = <20>; + cdns,tslch-ns = <20>; + + part0: qspi-boot@0 { + label = "Flash 0 Raw Data"; + reg = <0x0 0x01340000>; + }; + part1: qspi-rootfs@1320000 { + label = "Flash 1 jffs2 Filesystem"; + reg = <0x01340000 0x2cc0000>; + }; + }; +}; -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply related [flat|nested] 25+ messages in thread
[parent not found: <20210923165624.wCIpZMuEaOTqgzTIVio-auukBwIkYM1Ik1HRSlI8hTg@z>]
* Re: [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree [not found] ` <20210923165624.wCIpZMuEaOTqgzTIVio-auukBwIkYM1Ik1HRSlI8hTg@z> @ 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring 0 siblings, 1 reply; 25+ messages in thread From: Rob Herring @ 2021-09-23 16:56 UTC (permalink / raw) To: Paweł Anikiel Cc: miquel.raynal, richard, vigneshr, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Joanna Brozek, Mariusz Glebocki, Tomasz Gorochowik, Maciej Mikunda On Mon, Sep 20, 2021 at 02:41:40PM +0200, Paweł Anikiel wrote: > Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> > Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> > Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> > Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> > --- > arch/arm/boot/dts/Makefile | 1 + > .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ > 2 files changed, 128 insertions(+) > create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 7e0934180724..0a7809eb3795 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ > socfpga_arria10_socdk_nand.dtb \ > socfpga_arria10_socdk_qspi.dtb \ > socfpga_arria10_socdk_sdmmc.dtb \ > + socfpga_arria10_mercury_aa1.dtb \ > socfpga_cyclone5_chameleon96.dtb \ > socfpga_cyclone5_mcvevk.dtb \ > socfpga_cyclone5_socdk.dtb \ > diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > new file mode 100644 > index 000000000000..c13f16afa72f > --- /dev/null > +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > @@ -0,0 +1,127 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/dts-v1/; > + > +#include "socfpga_arria10.dtsi" > + > +/ { > + > + model = "Enclustra Mercury AA1"; > + compatible = "altr,socfpga-arria10", "altr,socfpga"; > + > + aliases { > + ethernet0 = &gmac0; > + serial1 = &uart1; > + }; > + > + memory { memory@0 > + name = "memory"; > + device_type = "memory"; > + reg = <0x0 0x80000000>; /* 2GB */ > + }; > + > + chosen { > + stdout-path = "serial1:115200n8"; > + }; > +}; > + > +&osc1 { > + clock-frequency = <33330000>; > +}; > + > +&usb0 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +/* Following mappings are taken from arria10 socdk dts */ > +&mmc { > + status = "okay"; > + cap-sd-highspeed; > + broken-cd; > + bus-width = <4>; > +}; > + > +&eccmgr { > + sdmmca-ecc@ff8c2c00 { > + compatible = "altr,socfpga-sdmmc-ecc"; > + reg = <0xff8c2c00 0x400>; > + altr,ecc-parent = <&mmc>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, > + <47 IRQ_TYPE_LEVEL_HIGH>, > + <16 IRQ_TYPE_LEVEL_HIGH>, > + <48 IRQ_TYPE_LEVEL_HIGH>; > + }; > +}; > + > +&gmac0 { > + phy-mode = "rgmii"; > + phy-addr = <0xffffffff>; /* probe for phy addr */ > + > + max-frame-size = <3800>; > + status = "okay"; > + > + phy-handle = <&phy3>; > + > + mdio0 { 'mdio' doesn't work? > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + phy3: ethernet-phy@3 { > + txd0-skew-ps = <0>; /* -420ps */ > + txd1-skew-ps = <0>; /* -420ps */ > + txd2-skew-ps = <0>; /* -420ps */ > + txd3-skew-ps = <0>; /* -420ps */ > + rxd0-skew-ps = <420>; /* 0ps */ > + rxd1-skew-ps = <420>; /* 0ps */ > + rxd2-skew-ps = <420>; /* 0ps */ > + rxd3-skew-ps = <420>; /* 0ps */ > + txen-skew-ps = <0>; /* -420ps */ > + txc-skew-ps = <1860>; /* 960ps */ > + rxdv-skew-ps = <420>; /* 0ps */ > + rxc-skew-ps = <1680>; /* 780ps */ > + reg = <3>; > + }; > + }; > +}; > + > +&i2c1 { > + status = "okay"; > + isl12022: isl12022@6f { > + status = "okay"; > + compatible = "isil,isl12022"; > + reg = <0x6f>; > + }; > +}; > + > +&uart1 { > + status = "okay"; > +}; > + > +&qspi { > + status = "disabled"; > + > + flash0: n25q00@0 { flash@0 > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "n25q00"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + cdns,page-size = <256>; > + cdns,block-size = <16>; > + m25p,fast-read; > + cdns,read-delay = <4>; > + cdns,tshsl-ns = <200>; > + cdns,tsd2d-ns = <255>; > + cdns,tchsh-ns = <20>; > + cdns,tslch-ns = <20>; > + > + part0: qspi-boot@0 { Put these under a 'partitions' node. > + label = "Flash 0 Raw Data"; > + reg = <0x0 0x01340000>; > + }; > + part1: qspi-rootfs@1320000 { > + label = "Flash 1 jffs2 Filesystem"; > + reg = <0x01340000 0x2cc0000>; > + }; > + }; > +}; > -- > 2.25.1 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree 2021-09-23 16:56 ` Rob Herring @ 2021-09-23 16:56 ` Rob Herring 0 siblings, 0 replies; 25+ messages in thread From: Rob Herring @ 2021-09-23 16:56 UTC (permalink / raw) To: Paweł Anikiel Cc: miquel.raynal, richard, vigneshr, arnd, olof, soc, dinguyen, p.zabel, linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Joanna Brozek, Mariusz Glebocki, Tomasz Gorochowik, Maciej Mikunda On Mon, Sep 20, 2021 at 02:41:40PM +0200, Paweł Anikiel wrote: > Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> > Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> > Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> > Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> > --- > arch/arm/boot/dts/Makefile | 1 + > .../boot/dts/socfpga_arria10_mercury_aa1.dts | 127 ++++++++++++++++++ > 2 files changed, 128 insertions(+) > create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 7e0934180724..0a7809eb3795 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1078,6 +1078,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ > socfpga_arria10_socdk_nand.dtb \ > socfpga_arria10_socdk_qspi.dtb \ > socfpga_arria10_socdk_sdmmc.dtb \ > + socfpga_arria10_mercury_aa1.dtb \ > socfpga_cyclone5_chameleon96.dtb \ > socfpga_cyclone5_mcvevk.dtb \ > socfpga_cyclone5_socdk.dtb \ > diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > new file mode 100644 > index 000000000000..c13f16afa72f > --- /dev/null > +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts > @@ -0,0 +1,127 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/dts-v1/; > + > +#include "socfpga_arria10.dtsi" > + > +/ { > + > + model = "Enclustra Mercury AA1"; > + compatible = "altr,socfpga-arria10", "altr,socfpga"; > + > + aliases { > + ethernet0 = &gmac0; > + serial1 = &uart1; > + }; > + > + memory { memory@0 > + name = "memory"; > + device_type = "memory"; > + reg = <0x0 0x80000000>; /* 2GB */ > + }; > + > + chosen { > + stdout-path = "serial1:115200n8"; > + }; > +}; > + > +&osc1 { > + clock-frequency = <33330000>; > +}; > + > +&usb0 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +/* Following mappings are taken from arria10 socdk dts */ > +&mmc { > + status = "okay"; > + cap-sd-highspeed; > + broken-cd; > + bus-width = <4>; > +}; > + > +&eccmgr { > + sdmmca-ecc@ff8c2c00 { > + compatible = "altr,socfpga-sdmmc-ecc"; > + reg = <0xff8c2c00 0x400>; > + altr,ecc-parent = <&mmc>; > + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, > + <47 IRQ_TYPE_LEVEL_HIGH>, > + <16 IRQ_TYPE_LEVEL_HIGH>, > + <48 IRQ_TYPE_LEVEL_HIGH>; > + }; > +}; > + > +&gmac0 { > + phy-mode = "rgmii"; > + phy-addr = <0xffffffff>; /* probe for phy addr */ > + > + max-frame-size = <3800>; > + status = "okay"; > + > + phy-handle = <&phy3>; > + > + mdio0 { 'mdio' doesn't work? > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + phy3: ethernet-phy@3 { > + txd0-skew-ps = <0>; /* -420ps */ > + txd1-skew-ps = <0>; /* -420ps */ > + txd2-skew-ps = <0>; /* -420ps */ > + txd3-skew-ps = <0>; /* -420ps */ > + rxd0-skew-ps = <420>; /* 0ps */ > + rxd1-skew-ps = <420>; /* 0ps */ > + rxd2-skew-ps = <420>; /* 0ps */ > + rxd3-skew-ps = <420>; /* 0ps */ > + txen-skew-ps = <0>; /* -420ps */ > + txc-skew-ps = <1860>; /* 960ps */ > + rxdv-skew-ps = <420>; /* 0ps */ > + rxc-skew-ps = <1680>; /* 780ps */ > + reg = <3>; > + }; > + }; > +}; > + > +&i2c1 { > + status = "okay"; > + isl12022: isl12022@6f { > + status = "okay"; > + compatible = "isil,isl12022"; > + reg = <0x6f>; > + }; > +}; > + > +&uart1 { > + status = "okay"; > +}; > + > +&qspi { > + status = "disabled"; > + > + flash0: n25q00@0 { flash@0 > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "n25q00"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + cdns,page-size = <256>; > + cdns,block-size = <16>; > + m25p,fast-read; > + cdns,read-delay = <4>; > + cdns,tshsl-ns = <200>; > + cdns,tsd2d-ns = <255>; > + cdns,tchsh-ns = <20>; > + cdns,tslch-ns = <20>; > + > + part0: qspi-boot@0 { Put these under a 'partitions' node. > + label = "Flash 0 Raw Data"; > + reg = <0x0 0x01340000>; > + }; > + part1: qspi-rootfs@1320000 { > + label = "Flash 1 jffs2 Filesystem"; > + reg = <0x01340000 0x2cc0000>; > + }; > + }; > +}; > -- > 2.25.1 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <20210920124141.dOhXof_mbq7fNGtevvmYnhhpG15cTTgPtsQcSOqhER8@z>]
* [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe [not found] ` <20210920124141.dOhXof_mbq7fNGtevvmYnhhpG15cTTgPtsQcSOqhER8@z> @ 2021-09-20 12:41 ` Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z> 0 siblings, 2 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel The early reset driver doesn't ever probe, which causes consuming devices to be unable to probe. Add an empty driver to set this device as available, allowing consumers to probe. Signed-off-by: Paweł Anikiel <pan@semihalf.com> --- drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index 2a72f861f798..8c6492e5693c 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) for_each_matching_node(np, socfpga_early_reset_dt_ids) a10_reset_init(np); } + +/* + * The early driver is problematic, because it doesn't register + * itself as a driver. This causes certain device links to prevent + * consumer devices from probing. The hacky solution is to register + * an empty driver, whose only job is to attach itself to the reset + * manager and call probe. + */ +static const struct of_device_id socfpga_reset_dt_ids[] = { + { .compatible = "altr,rst-mgr", }, + { /* sentinel */ }, +}; + +static int reset_simple_probe(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver reset_socfpga_driver = { + .probe = reset_simple_probe, + .driver = { + .name = "socfpga-reset", + .of_match_table = socfpga_reset_dt_ids, + }, +}; +builtin_platform_driver(reset_socfpga_driver); -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-09-20 12:41 ` [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe Paweł Anikiel @ 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z> 1 sibling, 0 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-09-20 12:41 UTC (permalink / raw) To: miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen, p.zabel Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam, Paweł Anikiel The early reset driver doesn't ever probe, which causes consuming devices to be unable to probe. Add an empty driver to set this device as available, allowing consumers to probe. Signed-off-by: Paweł Anikiel <pan@semihalf.com> --- drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index 2a72f861f798..8c6492e5693c 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) for_each_matching_node(np, socfpga_early_reset_dt_ids) a10_reset_init(np); } + +/* + * The early driver is problematic, because it doesn't register + * itself as a driver. This causes certain device links to prevent + * consumer devices from probing. The hacky solution is to register + * an empty driver, whose only job is to attach itself to the reset + * manager and call probe. + */ +static const struct of_device_id socfpga_reset_dt_ids[] = { + { .compatible = "altr,rst-mgr", }, + { /* sentinel */ }, +}; + +static int reset_simple_probe(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver reset_socfpga_driver = { + .probe = reset_simple_probe, + .driver = { + .name = "socfpga-reset", + .of_match_table = socfpga_reset_dt_ids, + }, +}; +builtin_platform_driver(reset_socfpga_driver); -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply related [flat|nested] 25+ messages in thread
[parent not found: <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z>]
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe [not found] ` <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z> @ 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel ` (2 more replies) 0 siblings, 3 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 9:34 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam Hi Paweł, On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > The early reset driver doesn't ever probe, which causes consuming > devices to be unable to probe. Add an empty driver to set this device > as available, allowing consumers to probe. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > index 2a72f861f798..8c6492e5693c 100644 > --- a/drivers/reset/reset-socfpga.c > +++ b/drivers/reset/reset-socfpga.c > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > for_each_matching_node(np, socfpga_early_reset_dt_ids) > a10_reset_init(np); > } > + > +/* > + * The early driver is problematic, because it doesn't register > + * itself as a driver. This causes certain device links to prevent > + * consumer devices from probing. The hacky solution is to register > + * an empty driver, whose only job is to attach itself to the reset > + * manager and call probe. > + */ > +static const struct of_device_id socfpga_reset_dt_ids[] = { > + { .compatible = "altr,rst-mgr", }, > + { /* sentinel */ }, > +}; > + > +static int reset_simple_probe(struct platform_device *pdev) > +{ > + return 0; > +} > + > +static struct platform_driver reset_socfpga_driver = { > + .probe = reset_simple_probe, > + .driver = { > + .name = "socfpga-reset", > + .of_match_table = socfpga_reset_dt_ids, > + }, > +}; > +builtin_platform_driver(reset_socfpga_driver); If we can just let devlink delay all consumers until the empty driver is probed, does the reset controller have to be registered early at all? regards Philipp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 9:34 ` Philipp Zabel @ 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel [not found] ` <20211005111205.yhacoo2AdAdnUkQ86NaPU0ASEexP3rjoqfZSlZF-dlI@z> 2 siblings, 0 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 9:34 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam Hi Paweł, On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > The early reset driver doesn't ever probe, which causes consuming > devices to be unable to probe. Add an empty driver to set this device > as available, allowing consumers to probe. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > index 2a72f861f798..8c6492e5693c 100644 > --- a/drivers/reset/reset-socfpga.c > +++ b/drivers/reset/reset-socfpga.c > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > for_each_matching_node(np, socfpga_early_reset_dt_ids) > a10_reset_init(np); > } > + > +/* > + * The early driver is problematic, because it doesn't register > + * itself as a driver. This causes certain device links to prevent > + * consumer devices from probing. The hacky solution is to register > + * an empty driver, whose only job is to attach itself to the reset > + * manager and call probe. > + */ > +static const struct of_device_id socfpga_reset_dt_ids[] = { > + { .compatible = "altr,rst-mgr", }, > + { /* sentinel */ }, > +}; > + > +static int reset_simple_probe(struct platform_device *pdev) > +{ > + return 0; > +} > + > +static struct platform_driver reset_socfpga_driver = { > + .probe = reset_simple_probe, > + .driver = { > + .name = "socfpga-reset", > + .of_match_table = socfpga_reset_dt_ids, > + }, > +}; > +builtin_platform_driver(reset_socfpga_driver); If we can just let devlink delay all consumers until the empty driver is probed, does the reset controller have to be registered early at all? regards Philipp ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel @ 2021-10-05 9:34 ` Philipp Zabel [not found] ` <20211005111205.yhacoo2AdAdnUkQ86NaPU0ASEexP3rjoqfZSlZF-dlI@z> 2 siblings, 0 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 9:34 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, tn, ka, jam Hi Paweł, On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > The early reset driver doesn't ever probe, which causes consuming > devices to be unable to probe. Add an empty driver to set this device > as available, allowing consumers to probe. > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > --- > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > index 2a72f861f798..8c6492e5693c 100644 > --- a/drivers/reset/reset-socfpga.c > +++ b/drivers/reset/reset-socfpga.c > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > for_each_matching_node(np, socfpga_early_reset_dt_ids) > a10_reset_init(np); > } > + > +/* > + * The early driver is problematic, because it doesn't register > + * itself as a driver. This causes certain device links to prevent > + * consumer devices from probing. The hacky solution is to register > + * an empty driver, whose only job is to attach itself to the reset > + * manager and call probe. > + */ > +static const struct of_device_id socfpga_reset_dt_ids[] = { > + { .compatible = "altr,rst-mgr", }, > + { /* sentinel */ }, > +}; > + > +static int reset_simple_probe(struct platform_device *pdev) > +{ > + return 0; > +} > + > +static struct platform_driver reset_socfpga_driver = { > + .probe = reset_simple_probe, > + .driver = { > + .name = "socfpga-reset", > + .of_match_table = socfpga_reset_dt_ids, > + }, > +}; > +builtin_platform_driver(reset_socfpga_driver); If we can just let devlink delay all consumers until the empty driver is probed, does the reset controller have to be registered early at all? regards Philipp ^ permalink raw reply [flat|nested] 25+ messages in thread
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* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe [not found] ` <20211005111205.yhacoo2AdAdnUkQ86NaPU0ASEexP3rjoqfZSlZF-dlI@z> @ 2021-10-05 11:12 ` Paweł Anikiel [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> ` (2 more replies) 0 siblings, 3 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-10-05 11:12 UTC (permalink / raw) To: Philipp Zabel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > The early reset driver doesn't ever probe, which causes consuming > > devices to be unable to probe. Add an empty driver to set this device > > as available, allowing consumers to probe. > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > --- > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > index 2a72f861f798..8c6492e5693c 100644 > > --- a/drivers/reset/reset-socfpga.c > > +++ b/drivers/reset/reset-socfpga.c > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > a10_reset_init(np); > > } > > + > > +/* > > + * The early driver is problematic, because it doesn't register > > + * itself as a driver. This causes certain device links to prevent > > + * consumer devices from probing. The hacky solution is to register > > + * an empty driver, whose only job is to attach itself to the reset > > + * manager and call probe. > > + */ > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > + { .compatible = "altr,rst-mgr", }, > > + { /* sentinel */ }, > > +}; > > + > > +static int reset_simple_probe(struct platform_device *pdev) > > +{ > > + return 0; > > +} > > + > > +static struct platform_driver reset_socfpga_driver = { > > + .probe = reset_simple_probe, > > + .driver = { > > + .name = "socfpga-reset", > > + .of_match_table = socfpga_reset_dt_ids, > > + }, > > +}; > > +builtin_platform_driver(reset_socfpga_driver); > > If we can just let devlink delay all consumers until the empty driver is > probed, does the reset controller have to be registered early at all? > > regards > Philipp I asked Dinh if the reset controller code needs to be called early: >That's correct. It's for one of the SP timers. > >On 9/16/21 6:13 AM, Paweł Anikiel wrote: >> Hi, >> >> I would like to ask you about the following commit: >>> commit b3ca9888f35fa6919569cf27c929dc0ac49e9716 >>> Author: Dinh Nguyen <dinguyen@kernel.org> >>> Date: Tue Nov 13 12:50:48 2018 -0600 >>> >>> reset: socfpga: add an early reset driver for SoCFPGA >>> >>> Create a separate reset driver that uses the reset operations in >>> reset-simple. The reset driver for the SoCFPGA platform needs to >>> register early in order to be able bring online timers that needed >>> early in the kernel bootup. >>> [...] >> Which online timers is this commit message referring to? I couldn't find >> any information about this. Without this patch the kernel seems to work >> fine on an Arria 10 (with Mercury AA1 module). What's the exact reason >> a regular platform driver isn't sufficient? >> >> Best regards, >> Paweł >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
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* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> @ 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 0 siblings, 2 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 10:22 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, 2021-10-05 at 13:12 +0200, Paweł Anikiel wrote: > On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > > The early reset driver doesn't ever probe, which causes consuming > > > devices to be unable to probe. Add an empty driver to set this device > > > as available, allowing consumers to probe. > > > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > > --- > > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > > 1 file changed, 26 insertions(+) > > > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > > index 2a72f861f798..8c6492e5693c 100644 > > > --- a/drivers/reset/reset-socfpga.c > > > +++ b/drivers/reset/reset-socfpga.c > > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > > a10_reset_init(np); > > > } > > > + > > > +/* > > > + * The early driver is problematic, because it doesn't register > > > + * itself as a driver. This causes certain device links to prevent > > > + * consumer devices from probing. The hacky solution is to register > > > + * an empty driver, whose only job is to attach itself to the reset > > > + * manager and call probe. > > > + */ > > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > > + { .compatible = "altr,rst-mgr", }, > > > + { /* sentinel */ }, > > > +}; > > > + > > > +static int reset_simple_probe(struct platform_device *pdev) > > > +{ > > > + return 0; > > > +} > > > + > > > +static struct platform_driver reset_socfpga_driver = { > > > + .probe = reset_simple_probe, > > > + .driver = { > > > + .name = "socfpga-reset", > > > + .of_match_table = socfpga_reset_dt_ids, > > > + }, > > > +}; > > > +builtin_platform_driver(reset_socfpga_driver); > > > > If we can just let devlink delay all consumers until the empty driver is > > probed, does the reset controller have to be registered early at all? > > > > regards > > Philipp > > I asked Dinh if the reset controller code needs to be called early: > > > That's correct. It's for one of the SP timers. Ah, right, those call of_reset_control_get() from TIMER_OF_DECLARE(). Thank you, I'll apply this to reset/fixes. regards Philipp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 10:22 ` Philipp Zabel @ 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 1 sibling, 0 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 10:22 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, 2021-10-05 at 13:12 +0200, Paweł Anikiel wrote: > On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > > The early reset driver doesn't ever probe, which causes consuming > > > devices to be unable to probe. Add an empty driver to set this device > > > as available, allowing consumers to probe. > > > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > > --- > > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > > 1 file changed, 26 insertions(+) > > > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > > index 2a72f861f798..8c6492e5693c 100644 > > > --- a/drivers/reset/reset-socfpga.c > > > +++ b/drivers/reset/reset-socfpga.c > > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > > a10_reset_init(np); > > > } > > > + > > > +/* > > > + * The early driver is problematic, because it doesn't register > > > + * itself as a driver. This causes certain device links to prevent > > > + * consumer devices from probing. The hacky solution is to register > > > + * an empty driver, whose only job is to attach itself to the reset > > > + * manager and call probe. > > > + */ > > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > > + { .compatible = "altr,rst-mgr", }, > > > + { /* sentinel */ }, > > > +}; > > > + > > > +static int reset_simple_probe(struct platform_device *pdev) > > > +{ > > > + return 0; > > > +} > > > + > > > +static struct platform_driver reset_socfpga_driver = { > > > + .probe = reset_simple_probe, > > > + .driver = { > > > + .name = "socfpga-reset", > > > + .of_match_table = socfpga_reset_dt_ids, > > > + }, > > > +}; > > > +builtin_platform_driver(reset_socfpga_driver); > > > > If we can just let devlink delay all consumers until the empty driver is > > probed, does the reset controller have to be registered early at all? > > > > regards > > Philipp > > I asked Dinh if the reset controller code needs to be called early: > > > That's correct. It's for one of the SP timers. Ah, right, those call of_reset_control_get() from TIMER_OF_DECLARE(). Thank you, I'll apply this to reset/fixes. regards Philipp ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel @ 2021-10-05 10:22 ` Philipp Zabel 1 sibling, 0 replies; 25+ messages in thread From: Philipp Zabel @ 2021-10-05 10:22 UTC (permalink / raw) To: Paweł Anikiel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, 2021-10-05 at 13:12 +0200, Paweł Anikiel wrote: > On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > > The early reset driver doesn't ever probe, which causes consuming > > > devices to be unable to probe. Add an empty driver to set this device > > > as available, allowing consumers to probe. > > > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > > --- > > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > > 1 file changed, 26 insertions(+) > > > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > > index 2a72f861f798..8c6492e5693c 100644 > > > --- a/drivers/reset/reset-socfpga.c > > > +++ b/drivers/reset/reset-socfpga.c > > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > > a10_reset_init(np); > > > } > > > + > > > +/* > > > + * The early driver is problematic, because it doesn't register > > > + * itself as a driver. This causes certain device links to prevent > > > + * consumer devices from probing. The hacky solution is to register > > > + * an empty driver, whose only job is to attach itself to the reset > > > + * manager and call probe. > > > + */ > > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > > + { .compatible = "altr,rst-mgr", }, > > > + { /* sentinel */ }, > > > +}; > > > + > > > +static int reset_simple_probe(struct platform_device *pdev) > > > +{ > > > + return 0; > > > +} > > > + > > > +static struct platform_driver reset_socfpga_driver = { > > > + .probe = reset_simple_probe, > > > + .driver = { > > > + .name = "socfpga-reset", > > > + .of_match_table = socfpga_reset_dt_ids, > > > + }, > > > +}; > > > +builtin_platform_driver(reset_socfpga_driver); > > > > If we can just let devlink delay all consumers until the empty driver is > > probed, does the reset controller have to be registered early at all? > > > > regards > > Philipp > > I asked Dinh if the reset controller code needs to be called early: > > > That's correct. It's for one of the SP timers. Ah, right, those call of_reset_control_get() from TIMER_OF_DECLARE(). Thank you, I'll apply this to reset/fixes. regards Philipp ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 11:12 ` Paweł Anikiel [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> @ 2021-10-05 11:12 ` Paweł Anikiel 2021-10-05 11:12 ` Paweł Anikiel 2 siblings, 0 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-10-05 11:12 UTC (permalink / raw) To: Philipp Zabel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > The early reset driver doesn't ever probe, which causes consuming > > devices to be unable to probe. Add an empty driver to set this device > > as available, allowing consumers to probe. > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > --- > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > index 2a72f861f798..8c6492e5693c 100644 > > --- a/drivers/reset/reset-socfpga.c > > +++ b/drivers/reset/reset-socfpga.c > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > a10_reset_init(np); > > } > > + > > +/* > > + * The early driver is problematic, because it doesn't register > > + * itself as a driver. This causes certain device links to prevent > > + * consumer devices from probing. The hacky solution is to register > > + * an empty driver, whose only job is to attach itself to the reset > > + * manager and call probe. > > + */ > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > + { .compatible = "altr,rst-mgr", }, > > + { /* sentinel */ }, > > +}; > > + > > +static int reset_simple_probe(struct platform_device *pdev) > > +{ > > + return 0; > > +} > > + > > +static struct platform_driver reset_socfpga_driver = { > > + .probe = reset_simple_probe, > > + .driver = { > > + .name = "socfpga-reset", > > + .of_match_table = socfpga_reset_dt_ids, > > + }, > > +}; > > +builtin_platform_driver(reset_socfpga_driver); > > If we can just let devlink delay all consumers until the empty driver is > probed, does the reset controller have to be registered early at all? > > regards > Philipp I asked Dinh if the reset controller code needs to be called early: >That's correct. It's for one of the SP timers. > >On 9/16/21 6:13 AM, Paweł Anikiel wrote: >> Hi, >> >> I would like to ask you about the following commit: >>> commit b3ca9888f35fa6919569cf27c929dc0ac49e9716 >>> Author: Dinh Nguyen <dinguyen@kernel.org> >>> Date: Tue Nov 13 12:50:48 2018 -0600 >>> >>> reset: socfpga: add an early reset driver for SoCFPGA >>> >>> Create a separate reset driver that uses the reset operations in >>> reset-simple. The reset driver for the SoCFPGA platform needs to >>> register early in order to be able bring online timers that needed >>> early in the kernel bootup. >>> [...] >> Which online timers is this commit message referring to? I couldn't find >> any information about this. Without this patch the kernel seems to work >> fine on an Arria 10 (with Mercury AA1 module). What's the exact reason >> a regular platform driver isn't sufficient? >> >> Best regards, >> Paweł >> ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe 2021-10-05 11:12 ` Paweł Anikiel [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> 2021-10-05 11:12 ` Paweł Anikiel @ 2021-10-05 11:12 ` Paweł Anikiel 2 siblings, 0 replies; 25+ messages in thread From: Paweł Anikiel @ 2021-10-05 11:12 UTC (permalink / raw) To: Philipp Zabel, miquel.raynal, richard, vigneshr, robh+dt, arnd, olof, soc, dinguyen Cc: linux-mtd, devicetree, linux-kernel, linux-arm-kernel, Tomasz Nowicki, Konrad Adamczyk, Jacek Majkowski On Tue, Oct 5, 2021 at 11:34 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > > Hi Paweł, > > On Mon, 2021-09-20 at 14:41 +0200, Paweł Anikiel wrote: > > The early reset driver doesn't ever probe, which causes consuming > > devices to be unable to probe. Add an empty driver to set this device > > as available, allowing consumers to probe. > > > > Signed-off-by: Paweł Anikiel <pan@semihalf.com> > > --- > > drivers/reset/reset-socfpga.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > > index 2a72f861f798..8c6492e5693c 100644 > > --- a/drivers/reset/reset-socfpga.c > > +++ b/drivers/reset/reset-socfpga.c > > @@ -92,3 +92,29 @@ void __init socfpga_reset_init(void) > > for_each_matching_node(np, socfpga_early_reset_dt_ids) > > a10_reset_init(np); > > } > > + > > +/* > > + * The early driver is problematic, because it doesn't register > > + * itself as a driver. This causes certain device links to prevent > > + * consumer devices from probing. The hacky solution is to register > > + * an empty driver, whose only job is to attach itself to the reset > > + * manager and call probe. > > + */ > > +static const struct of_device_id socfpga_reset_dt_ids[] = { > > + { .compatible = "altr,rst-mgr", }, > > + { /* sentinel */ }, > > +}; > > + > > +static int reset_simple_probe(struct platform_device *pdev) > > +{ > > + return 0; > > +} > > + > > +static struct platform_driver reset_socfpga_driver = { > > + .probe = reset_simple_probe, > > + .driver = { > > + .name = "socfpga-reset", > > + .of_match_table = socfpga_reset_dt_ids, > > + }, > > +}; > > +builtin_platform_driver(reset_socfpga_driver); > > If we can just let devlink delay all consumers until the empty driver is > probed, does the reset controller have to be registered early at all? > > regards > Philipp I asked Dinh if the reset controller code needs to be called early: >That's correct. It's for one of the SP timers. > >On 9/16/21 6:13 AM, Paweł Anikiel wrote: >> Hi, >> >> I would like to ask you about the following commit: >>> commit b3ca9888f35fa6919569cf27c929dc0ac49e9716 >>> Author: Dinh Nguyen <dinguyen@kernel.org> >>> Date: Tue Nov 13 12:50:48 2018 -0600 >>> >>> reset: socfpga: add an early reset driver for SoCFPGA >>> >>> Create a separate reset driver that uses the reset operations in >>> reset-simple. The reset driver for the SoCFPGA platform needs to >>> register early in order to be able bring online timers that needed >>> early in the kernel bootup. >>> [...] >> Which online timers is this commit message referring to? I couldn't find >> any information about this. Without this patch the kernel seems to work >> fine on an Arria 10 (with Mercury AA1 module). What's the exact reason >> a regular platform driver isn't sufficient? >> >> Best regards, >> Paweł >> ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2021-10-05 12:01 UTC | newest] Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- [not found] <20210920124138.7Rv4Bat-mDXSJL5_d7ykDRJFDCAMP3dSiZm0nDPMaDU@z> 2021-09-20 12:41 ` [PATCH 0/3] Add support for the Mercury+ AA1 module Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210920124139.jQM-Tqzr63A2Hs1WHPqhhGaUuJiNYaCWKRl5YiR4iTA@z> 2021-09-20 12:41 ` [PATCH 1/3] dt-bindings: mtd: spi-nor: add n25q00 schema Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210923165648.FCg577uaG9fWz1MINUjzq_6XdotxOakHUOjndV9cMBM@z> 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring [not found] ` <20210923185904.twJ5GB7t8omyZ7RKqA5bcaS2QzsOxfghoI6XXJrCzfc@z> 2021-09-23 18:59 ` Pratyush Yadav 2021-09-23 18:59 ` Pratyush Yadav [not found] ` <20211005115906.sVeqCk7Lbj-UbEQBqo8aQDAVjC_bmmDQ6QaO3ChH2n4@z> 2021-10-05 11:59 ` Tudor.Ambarus 2021-10-05 11:59 ` Tudor.Ambarus [not found] ` <20210920124140.RZTw5kTlMXDVKDMnzhD0FZ5oHIQ_cZ6kTSSrKdQw9WU@z> 2021-09-20 12:41 ` [PATCH 2/3] dts: socfpga: Add Mercury+ AA1 devicetree Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20210923165624.wCIpZMuEaOTqgzTIVio-auukBwIkYM1Ik1HRSlI8hTg@z> 2021-09-23 16:56 ` Rob Herring 2021-09-23 16:56 ` Rob Herring [not found] ` <20210920124141.dOhXof_mbq7fNGtevvmYnhhpG15cTTgPtsQcSOqhER8@z> 2021-09-20 12:41 ` [PATCH 3/3] reset: socfpga: add empty driver allowing consumers to probe Paweł Anikiel 2021-09-20 12:41 ` Paweł Anikiel [not found] ` <20211005093407.6FCAsOZYukqdChGyMhvCtKU-0iQe1qmWgVVlQSxU-40@z> 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel 2021-10-05 9:34 ` Philipp Zabel [not found] ` <20211005111205.yhacoo2AdAdnUkQ86NaPU0ASEexP3rjoqfZSlZF-dlI@z> 2021-10-05 11:12 ` Paweł Anikiel [not found] ` <20211005102225.PzZXA7w0Qn5d_3_cHQbe86EPWtaa_CBoQpc89EEeouA@z> 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 10:22 ` Philipp Zabel 2021-10-05 11:12 ` Paweł Anikiel 2021-10-05 11:12 ` Paweł Anikiel
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