* FAILED: patch "[PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO" failed to apply to 4.19-stable tree
@ 2019-11-11 5:59 gregkh
2019-11-11 13:19 ` Sasha Levin
0 siblings, 1 reply; 3+ messages in thread
From: gregkh @ 2019-11-11 5:59 UTC (permalink / raw)
To: andriy.shevchenko, malin.jonsson, mika.westerberg, oliver.barta; +Cc: stable
The patch below does not apply to the 4.19-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 29c2c6aa32405dfee4a29911a51ba133edcedb0f Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Mon, 14 Oct 2019 12:51:04 +0300
Subject: [PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO
mode
When consumer requests a pin, in order to be on the safest side,
we switch it first to GPIO mode followed by immediate transition
to the input state. Due to posted writes it's luckily to be a single
I/O transaction.
However, if firmware or boot loader already configures the pin
to the GPIO mode, user expects no glitches for the requested pin.
We may check if the pin is pre-configured and leave it as is
till the actual consumer toggles its state to avoid glitches.
Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
Cc: stable@vger.kernel.org
Cc: fei.yang@intel.com
Reported-by: Oliver Barta <oliver.barta@aptiv.com>
Reported-by: Malin Jonsson <malin.jonsson@ericsson.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index bc013599a9a3..83981ad66a71 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -52,6 +52,7 @@
#define PADCFG0_GPIROUTNMI BIT(17)
#define PADCFG0_PMODE_SHIFT 10
#define PADCFG0_PMODE_MASK GENMASK(13, 10)
+#define PADCFG0_PMODE_GPIO 0
#define PADCFG0_GPIORXDIS BIT(9)
#define PADCFG0_GPIOTXDIS BIT(8)
#define PADCFG0_GPIORXSTATE BIT(1)
@@ -332,7 +333,7 @@ static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
- if (!mode)
+ if (mode == PADCFG0_PMODE_GPIO)
seq_puts(s, "GPIO ");
else
seq_printf(s, "mode %d ", mode);
@@ -458,6 +459,11 @@ static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input)
writel(value, padcfg0);
}
+static int intel_gpio_get_gpio_mode(void __iomem *padcfg0)
+{
+ return (readl(padcfg0) & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+}
+
static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
{
u32 value;
@@ -491,7 +497,20 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
}
padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+ /*
+ * If pin is already configured in GPIO mode, we assume that
+ * firmware provides correct settings. In such case we avoid
+ * potential glitches on the pin. Otherwise, for the pin in
+ * alternative mode, consumer has to supply respective flags.
+ */
+ if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) {
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+ return 0;
+ }
+
intel_gpio_set_gpio_mode(padcfg0);
+
/* Disable TX buffer and enable RX (this will be input) */
__intel_gpio_set_direction(padcfg0, true);
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: FAILED: patch "[PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO" failed to apply to 4.19-stable tree
2019-11-11 5:59 FAILED: patch "[PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO" failed to apply to 4.19-stable tree gregkh
@ 2019-11-11 13:19 ` Sasha Levin
2019-11-12 9:11 ` Andy Shevchenko
0 siblings, 1 reply; 3+ messages in thread
From: Sasha Levin @ 2019-11-11 13:19 UTC (permalink / raw)
To: gregkh
Cc: andriy.shevchenko, malin.jonsson, mika.westerberg, oliver.barta, stable
On Mon, Nov 11, 2019 at 06:59:53AM +0100, gregkh@linuxfoundation.org wrote:
>
>The patch below does not apply to the 4.19-stable tree.
>If someone wants it applied there, or to any other stable or longterm
>tree, then please email the backport, including the original git commit
>id to <stable@vger.kernel.org>.
>
>thanks,
>
>greg k-h
>
>------------------ original commit in Linus's tree ------------------
>
>From 29c2c6aa32405dfee4a29911a51ba133edcedb0f Mon Sep 17 00:00:00 2001
>From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>Date: Mon, 14 Oct 2019 12:51:04 +0300
>Subject: [PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO
> mode
>
>When consumer requests a pin, in order to be on the safest side,
>we switch it first to GPIO mode followed by immediate transition
>to the input state. Due to posted writes it's luckily to be a single
>I/O transaction.
>
>However, if firmware or boot loader already configures the pin
>to the GPIO mode, user expects no glitches for the requested pin.
>We may check if the pin is pre-configured and leave it as is
>till the actual consumer toggles its state to avoid glitches.
I've queued it up for 4.19, it was just a minor conflict with
e58926e781d8 ("pinctrl: intel: Use GENMASK() consistently").
However, for 4.14 and older:
>Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
>Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
We need to take this "Depends-on" commit, but in the past we have
reverted it:
https://lore.kernel.org/lkml/20180427135732.999030511@linuxfoundation.org/
So I didn't do anything with this patch for <=4.14.
--
Thanks,
Sasha
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: FAILED: patch "[PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO" failed to apply to 4.19-stable tree
2019-11-11 13:19 ` Sasha Levin
@ 2019-11-12 9:11 ` Andy Shevchenko
0 siblings, 0 replies; 3+ messages in thread
From: Andy Shevchenko @ 2019-11-12 9:11 UTC (permalink / raw)
To: Sasha Levin; +Cc: gregkh, malin.jonsson, mika.westerberg, oliver.barta, stable
On Mon, Nov 11, 2019 at 08:19:07AM -0500, Sasha Levin wrote:
> On Mon, Nov 11, 2019 at 06:59:53AM +0100, gregkh@linuxfoundation.org wrote:
> >
> > The patch below does not apply to the 4.19-stable tree.
> > If someone wants it applied there, or to any other stable or longterm
> > tree, then please email the backport, including the original git commit
> > id to <stable@vger.kernel.org>.
> >
> > thanks,
> >
> > greg k-h
> >
> > ------------------ original commit in Linus's tree ------------------
> >
> > From 29c2c6aa32405dfee4a29911a51ba133edcedb0f Mon Sep 17 00:00:00 2001
> > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Date: Mon, 14 Oct 2019 12:51:04 +0300
> > Subject: [PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO
> > mode
> >
> > When consumer requests a pin, in order to be on the safest side,
> > we switch it first to GPIO mode followed by immediate transition
> > to the input state. Due to posted writes it's luckily to be a single
> > I/O transaction.
> >
> > However, if firmware or boot loader already configures the pin
> > to the GPIO mode, user expects no glitches for the requested pin.
> > We may check if the pin is pre-configured and leave it as is
> > till the actual consumer toggles its state to avoid glitches.
>
> I've queued it up for 4.19, it was just a minor conflict with
> e58926e781d8 ("pinctrl: intel: Use GENMASK() consistently").
Thank you!
> However, for 4.14 and older:
>
> > Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
> > Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
>
> We need to take this "Depends-on" commit, but in the past we have
> reverted it:
>
> https://lore.kernel.org/lkml/20180427135732.999030511@linuxfoundation.org/
Yes, as the commit says that we have a lot of dependencies.
> So I didn't do anything with this patch for <=4.14.
So far so good, thanks!
P.S. In case we need it in the future, we will prepare a backport patch
ourselves.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-11-11 5:59 FAILED: patch "[PATCH] pinctrl: intel: Avoid potential glitches if pin is in GPIO" failed to apply to 4.19-stable tree gregkh
2019-11-11 13:19 ` Sasha Levin
2019-11-12 9:11 ` Andy Shevchenko
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