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From: Suzuki K Poulose <>
To: Greg KH <>
Subject: Re: [PATCH] arm64: cpufeature: Fix truncating a feature value
Date: Fri, 11 Oct 2019 11:31:30 +0100
Message-ID: <> (raw)
In-Reply-To: <>

Hi Greg,

On 11/10/2019 05:55, Greg KH wrote:
> On Thu, Oct 10, 2019 at 02:19:43PM +0100, Suzuki K Poulose wrote:
>> A signed feature value is truncated to turn to an unsigned value
>> causing bad state in the system wide infrastructure. This affects
>> the discovery of FP/ASIMD support on arm64. Fix this by making sure
>> we cast it properly.
>> This was inadvertently fixed upstream in v4.6 onwards with the following :
>> commit 28c5dcb22f90113dea ("arm64: Rename cpuid_feature field extract routines")
> What prevents us from just taking that commit instead?  You did not
> document that here at all, which I thought I asked for.

Sorry, I missed that part. So, that change introduces helpers to
extract feature fields based on the sign. And it also depends on

commit ff96f7bc7bf6 ("arm64: capabilities: Handle sign of the feature bit")

which introduces "sign" bit for the "capability" list and modifies
the generic capability->matches() helpers to use the hint to switch to the
appropriate helpers.

I could backport parts of the commit 28c5dcb22f90 dropping the bits
that affect the changes mentioned above.

> Also, you only need 12 digits for a sha1, 28c5dcb22f90 ("arm64: Rename
> cpuid_feature field extract routines") would be just fine :)

Yea, I understand. Its simply a pain to count the numbers, so I make sure
to pickup something that looks larger than the 12 ;-). I will try to stick
to that :-)


  reply index

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-10 11:08 Suzuki K Poulose
2019-10-10 11:12 ` Suzuki K Poulose
2019-10-10 12:29   ` Greg KH
2019-10-10 12:46     ` Suzuki K Poulose
2019-10-10 13:16       ` Greg KH
2019-10-10 13:19     ` Suzuki K Poulose
2019-10-11  4:55       ` Greg KH
2019-10-11 10:31         ` Suzuki K Poulose [this message]
2019-10-11 12:13           ` Greg KH

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