* [PATCH] xtensa: add missing isync to the cpu_reset TLB code
@ 2019-08-12 22:08 Max Filippov
[not found] ` <20190813124815.D64A520840@mail.kernel.org>
0 siblings, 1 reply; 2+ messages in thread
From: Max Filippov @ 2019-08-12 22:08 UTC (permalink / raw)
To: linux-xtensa; +Cc: Chris Zankel, Max Filippov, stable
ITLB entry modifications must be followed by the isync instruction
before the new entries are possibly used. cpu_reset lacks one isync
between ITLB way 6 initialization and jump to the identity mapping.
Add missing isync to xtensa cpu_reset.
Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
arch/xtensa/kernel/setup.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 5cb8a62e091c..7c3106093c75 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -511,6 +511,7 @@ void cpu_reset(void)
"add %2, %2, %7\n\t"
"addi %0, %0, -1\n\t"
"bnez %0, 1b\n\t"
+ "isync\n\t"
/* Jump to identity mapping */
"jx %3\n"
"2:\n\t"
--
2.11.0
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2019-08-12 22:08 [PATCH] xtensa: add missing isync to the cpu_reset TLB code Max Filippov
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2019-08-13 14:53 ` Max Filippov
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