* [PATCH] ddr: socfpga: Fix integer overflow
@ 2022-08-30 6:42 Jit Loon Lim
2022-09-02 11:20 ` Marek Vasut
0 siblings, 1 reply; 2+ messages in thread
From: Jit Loon Lim @ 2022-08-30 6:42 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Sieu Mun Tang, Jit Loon Lim
From: Tien Fong Chee <tien.fong.chee@intel.com>
dramaddrw data structure are defined as u32. Compiler assume 32-bit
arithmetic on expression and the shifting operation to be done on a
32-bit value. So, the expression would overflow if the shifting
is more than 32-bit.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
drivers/ddr/altera/sdram_soc64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 9b1710c135..81ad02118b 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -246,7 +246,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_COL_ADDR_WIDTH(dramaddrw));
- size *= (2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
+ size *= ((phys_size_t)2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
DDR_HMC_DDRIOCTRL_IOSIZE_MSK));
return size;
--
2.26.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ddr: socfpga: Fix integer overflow
2022-08-30 6:42 [PATCH] ddr: socfpga: Fix integer overflow Jit Loon Lim
@ 2022-09-02 11:20 ` Marek Vasut
0 siblings, 0 replies; 2+ messages in thread
From: Marek Vasut @ 2022-09-02 11:20 UTC (permalink / raw)
To: Jit Loon Lim, u-boot
Cc: Jagan Teki, Vignesh R, Simon, Tien Fong, Kok Kiang, Siew Chin,
Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng, Hazim,
Sieu Mun Tang
On 8/30/22 08:42, Jit Loon Lim wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
>
> dramaddrw data structure are defined as u32. Compiler assume 32-bit
> arithmetic on expression and the shifting operation to be done on a
> 32-bit value. So, the expression would overflow if the shifting
> is more than 32-bit.
>
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
> drivers/ddr/altera/sdram_soc64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
> index 9b1710c135..81ad02118b 100644
> --- a/drivers/ddr/altera/sdram_soc64.c
> +++ b/drivers/ddr/altera/sdram_soc64.c
> @@ -246,7 +246,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
> DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
> DRAMADDRW_CFG_COL_ADDR_WIDTH(dramaddrw));
>
> - size *= (2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
> + size *= ((phys_size_t)2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
What about using 2UL or 2ULL here, would that work too ?
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-09-02 11:20 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-30 6:42 [PATCH] ddr: socfpga: Fix integer overflow Jit Loon Lim
2022-09-02 11:20 ` Marek Vasut
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).