From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
Vijay Kilari <vijay.kilari@gmail.com>,
Shanker Donthineni <shankerd@codeaurora.org>
Subject: Re: [PATCH v10 04/32] ARM: vGIC: rework gic_remove_from_queues()
Date: Tue, 30 May 2017 12:15:17 +0100 [thread overview]
Message-ID: <01e97131-7559-4471-2c06-b44f3525d0cf@arm.com> (raw)
In-Reply-To: <20170526173540.10066-5-andre.przywara@arm.com>
Hi Andre,
On 26/05/17 18:35, Andre Przywara wrote:
> The function name gic_remove_from_queues() was a bit of a misnomer,
> since it just removes an IRQ from the pending queue, not both queues.
> Rename the function to make this more clear, also give it a pointer to
> a struct pending_irq directly and rely on the VGIC VCPU lock to be
> already taken, so this can be used in more places.
> Replace the list removal in gic_clear_pending_irqs() with a call to
> this function.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> xen/arch/arm/gic.c | 12 +++---------
> xen/arch/arm/vgic.c | 2 +-
> xen/include/asm-arm/gic.h | 2 +-
> 3 files changed, 5 insertions(+), 11 deletions(-)
>
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index dcb1783..9dde146 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -400,18 +400,12 @@ static inline void gic_add_to_lr_pending(struct vcpu *v, struct pending_irq *n)
> list_add_tail(&n->lr_queue, &v->arch.vgic.lr_pending);
> }
>
> -void gic_remove_from_queues(struct vcpu *v, unsigned int virtual_irq)
> +void gic_remove_from_lr_pending(struct vcpu *v, struct pending_irq *p)
> {
> - struct pending_irq *p;
> - unsigned long flags;
> -
> - spin_lock_irqsave(&v->arch.vgic.lock, flags);
> -
> - p = irq_to_pending(v, virtual_irq);
> + ASSERT(spin_is_locked(&v->arch.vgic.lock));
Likely something before was wrong if you replace the lock by an ASSERT
without even adding lock in the current callers. Such as the deadlock
introduced in the previous patch...
>
> if ( !list_empty(&p->lr_queue) )
Whilst you rework gic_remove_from_queues, you could probably remove this
check.
> list_del_init(&p->lr_queue);
> - spin_unlock_irqrestore(&v->arch.vgic.lock, flags);
> }
>
> void gic_raise_inflight_irq(struct vcpu *v, unsigned int virtual_irq)
> @@ -612,7 +606,7 @@ void gic_clear_pending_irqs(struct vcpu *v)
>
> v->arch.lr_mask = 0;
> list_for_each_entry_safe ( p, t, &v->arch.vgic.lr_pending, lr_queue )
> - list_del_init(&p->lr_queue);
> + gic_remove_from_lr_pending(v, p);
> }
>
> int gic_events_need_delivery(void)
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 69d732b..3993965 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -325,7 +325,7 @@ void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n)
> spin_lock_irqsave(&v_target->arch.vgic.lock, flags);
> p = irq_to_pending(v_target, irq);
> clear_bit(GIC_IRQ_GUEST_ENABLED, &p->status);
> - gic_remove_from_queues(v_target, irq);
> + gic_remove_from_lr_pending(v_target, p);
> desc = p->desc;
> spin_unlock_irqrestore(&v_target->arch.vgic.lock, flags);
>
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index 836a103..3130634 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -243,7 +243,7 @@ extern void init_maintenance_interrupt(void);
> extern void gic_raise_guest_irq(struct vcpu *v, unsigned int irq,
> unsigned int priority);
> extern void gic_raise_inflight_irq(struct vcpu *v, unsigned int virtual_irq);
> -extern void gic_remove_from_queues(struct vcpu *v, unsigned int virtual_irq);
> +extern void gic_remove_from_lr_pending(struct vcpu *v, struct pending_irq *p);
>
> /* Accept an interrupt from the GIC and dispatch its handler */
> extern void gic_interrupt(struct cpu_user_regs *regs, int is_fiq);
>
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2017-05-30 11:15 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-26 17:35 [PATCH v10 00/32] arm64: Dom0 ITS emulation Andre Przywara
2017-05-26 17:35 ` [PATCH v10 01/32] ARM: vGIC: avoid rank lock when reading priority Andre Przywara
2017-05-30 10:47 ` Julien Grall
2017-05-30 21:39 ` Stefano Stabellini
2017-05-31 10:42 ` Julien Grall
2017-06-02 17:44 ` Julien Grall
2017-06-06 17:06 ` Andre Przywara
2017-06-06 17:11 ` Julien Grall
2017-06-06 17:20 ` Andre Przywara
2017-06-06 17:21 ` Julien Grall
2017-06-06 18:39 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 02/32] ARM: GICv3: setup number of LPI bits for a GICv3 guest Andre Przywara
2017-05-30 10:54 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 03/32] ARM: vGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-05-30 11:08 ` Julien Grall
2017-05-30 21:46 ` Stefano Stabellini
2017-05-31 10:44 ` Julien Grall
2017-06-06 17:24 ` Andre Przywara
2017-06-06 18:46 ` Stefano Stabellini
2017-06-07 10:49 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 04/32] ARM: vGIC: rework gic_remove_from_queues() Andre Przywara
2017-05-30 11:15 ` Julien Grall [this message]
2017-05-26 17:35 ` [PATCH v10 05/32] ARM: vGIC: introduce gic_remove_irq() Andre Przywara
2017-05-30 11:31 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 06/32] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-05-30 11:38 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-06-07 11:19 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 07/32] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-05-26 17:35 ` [PATCH v10 08/32] ARM: GIC: export and extend vgic_init_pending_irq() Andre Przywara
2017-05-26 17:35 ` [PATCH v10 09/32] ARM: vGIC: cache virtual LPI priority in struct pending_irq Andre Przywara
2017-05-26 17:35 ` [PATCH v10 10/32] ARM: vGIC: add LPI VCPU ID to " Andre Przywara
2017-05-26 17:35 ` [PATCH v10 11/32] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-05-30 11:56 ` Julien Grall
2017-05-30 22:07 ` Stefano Stabellini
2017-05-31 11:09 ` Julien Grall
2017-05-31 17:56 ` Stefano Stabellini
2017-05-31 18:39 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 12/32] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-05-30 11:58 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 13/32] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-05-26 17:35 ` [PATCH v10 14/32] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-05-26 17:35 ` [PATCH v10 15/32] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-05-26 17:35 ` [PATCH v10 16/32] ARM: vGIC: advertise LPI support Andre Przywara
2017-05-30 12:59 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 17/32] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-06-01 18:13 ` Julien Grall
2017-06-08 9:57 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 18/32] ARM: vITS: introduce translation table walks Andre Przywara
2017-06-02 16:25 ` Julien Grall
2017-06-08 9:35 ` Julien Grall
2017-06-08 9:45 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 19/32] ARM: vITS: provide access to struct pending_irq Andre Przywara
2017-06-02 16:32 ` Julien Grall
2017-06-02 16:45 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-06-06 11:13 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 20/32] ARM: vITS: handle INT command Andre Przywara
2017-06-02 16:37 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 21/32] ARM: vITS: handle MAPC command Andre Przywara
2017-05-26 17:35 ` [PATCH v10 22/32] ARM: vITS: handle CLEAR command Andre Przywara
2017-06-02 16:40 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 23/32] ARM: vITS: handle MAPD command Andre Przywara
2017-06-02 16:46 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 24/32] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-06-02 16:55 ` Julien Grall
2017-06-02 20:45 ` Stefano Stabellini
2017-06-08 9:45 ` Julien Grall
2017-06-08 13:51 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 25/32] ARM: vITS: handle MAPTI/MAPI command Andre Przywara
2017-06-02 17:12 ` Julien Grall
2017-06-07 17:49 ` Andre Przywara
2017-06-12 16:33 ` Julien Grall
2017-06-09 11:17 ` Andre Przywara
2017-06-09 19:14 ` Stefano Stabellini
2017-06-12 16:10 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 26/32] ARM: vITS: handle MOVI command Andre Przywara
2017-05-30 22:35 ` Stefano Stabellini
2017-05-31 11:23 ` Julien Grall
2017-05-31 17:53 ` Stefano Stabellini
2017-05-31 18:49 ` Julien Grall
2017-06-02 17:17 ` Julien Grall
2017-06-02 20:36 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 27/32] ARM: vITS: handle DISCARD command Andre Przywara
2017-06-02 17:21 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 28/32] ARM: vITS: handle INV command Andre Przywara
2017-05-30 22:23 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 29/32] ARM: vITS: handle INVALL command Andre Przywara
2017-06-02 17:27 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 30/32] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-05-26 17:35 ` [PATCH v10 31/32] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-06-02 17:31 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 32/32] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-06-02 17:33 ` Julien Grall
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