From: Andre Przywara <andre.przywara@arm.com>
To: Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
Vijay Kilari <vijay.kilari@gmail.com>,
Shanker Donthineni <shankerd@codeaurora.org>
Subject: [PATCH v10 22/32] ARM: vITS: handle CLEAR command
Date: Fri, 26 May 2017 18:35:30 +0100 [thread overview]
Message-ID: <20170526173540.10066-23-andre.przywara@arm.com> (raw)
In-Reply-To: <20170526173540.10066-1-andre.przywara@arm.com>
This introduces the ITS command handler for the CLEAR command, which
clears the pending state of an LPI.
This removes a not-yet injected, but already queued IRQ from a VCPU.
As read_itte() is now eventually used, we add the static keyword.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
xen/arch/arm/vgic-v3-its.c | 59 ++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index 77205bc..3ba49db 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -52,6 +52,7 @@
*/
struct virt_its {
struct domain *d;
+ paddr_t doorbell_address;
unsigned int devid_bits;
unsigned int evid_bits;
spinlock_t vcmd_lock; /* Protects the virtual command buffer, which */
@@ -235,8 +236,8 @@ static bool read_itte_locked(struct virt_its *its, uint32_t devid,
* This function takes care of the locking by taking the its_lock itself, so
* a caller shall not hold this. Before returning, the lock is dropped again.
*/
-bool read_itte(struct virt_its *its, uint32_t devid, uint32_t evid,
- struct vcpu **vcpu_ptr, uint32_t *vlpi_ptr)
+static bool read_itte(struct virt_its *its, uint32_t devid, uint32_t evid,
+ struct vcpu **vcpu_ptr, uint32_t *vlpi_ptr)
{
bool ret;
@@ -346,6 +347,57 @@ static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr)
return 0;
}
+/*
+ * CLEAR removes the pending state from an LPI. */
+static int its_handle_clear(struct virt_its *its, uint64_t *cmdptr)
+{
+ uint32_t devid = its_cmd_get_deviceid(cmdptr);
+ uint32_t eventid = its_cmd_get_id(cmdptr);
+ struct pending_irq *p;
+ struct vcpu *vcpu;
+ uint32_t vlpi;
+ unsigned long flags;
+ int ret = -1;
+
+ spin_lock(&its->its_lock);
+
+ /* Translate the DevID/EvID pair into a vCPU/vLPI pair. */
+ if ( !read_itte_locked(its, devid, eventid, &vcpu, &vlpi) )
+ goto out_unlock;
+
+ p = gicv3_its_get_event_pending_irq(its->d, its->doorbell_address,
+ devid, eventid);
+ /* Protect against an invalid LPI number. */
+ if ( unlikely(!p) )
+ goto out_unlock;
+
+ /*
+ * TODO: This relies on the VCPU being correct in the ITS tables.
+ * This can be fixed by either using a per-IRQ lock or by using
+ * the VCPU ID from the pending_irq instead.
+ */
+ spin_lock_irqsave(&vcpu->arch.vgic.lock, flags);
+
+ /*
+ * If the LPI is already visible on the guest, it is too late to
+ * clear the pending state. However this is a benign race that can
+ * happen on real hardware, too: If the LPI has already been forwarded
+ * to a CPU interface, a CLEAR request reaching the redistributor has
+ * no effect on that LPI anymore. Since LPIs are edge triggered and
+ * have no active state, we don't need to care about this here.
+ */
+ if ( !test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status) )
+ gic_remove_irq(vcpu, p);
+
+ spin_unlock_irqrestore(&vcpu->arch.vgic.lock, flags);
+ ret = 0;
+
+out_unlock:
+ spin_unlock(&its->its_lock);
+
+ return ret;
+}
+
#define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
#define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
@@ -375,6 +427,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its)
switch ( its_cmd_get_command(command) )
{
+ case GITS_CMD_CLEAR:
+ ret = its_handle_clear(its, command);
+ break;
case GITS_CMD_INT:
ret = its_handle_int(its, command);
break;
--
2.9.0
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next prev parent reply other threads:[~2017-05-26 17:36 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-26 17:35 [PATCH v10 00/32] arm64: Dom0 ITS emulation Andre Przywara
2017-05-26 17:35 ` [PATCH v10 01/32] ARM: vGIC: avoid rank lock when reading priority Andre Przywara
2017-05-30 10:47 ` Julien Grall
2017-05-30 21:39 ` Stefano Stabellini
2017-05-31 10:42 ` Julien Grall
2017-06-02 17:44 ` Julien Grall
2017-06-06 17:06 ` Andre Przywara
2017-06-06 17:11 ` Julien Grall
2017-06-06 17:20 ` Andre Przywara
2017-06-06 17:21 ` Julien Grall
2017-06-06 18:39 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 02/32] ARM: GICv3: setup number of LPI bits for a GICv3 guest Andre Przywara
2017-05-30 10:54 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 03/32] ARM: vGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-05-30 11:08 ` Julien Grall
2017-05-30 21:46 ` Stefano Stabellini
2017-05-31 10:44 ` Julien Grall
2017-06-06 17:24 ` Andre Przywara
2017-06-06 18:46 ` Stefano Stabellini
2017-06-07 10:49 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 04/32] ARM: vGIC: rework gic_remove_from_queues() Andre Przywara
2017-05-30 11:15 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 05/32] ARM: vGIC: introduce gic_remove_irq() Andre Przywara
2017-05-30 11:31 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 06/32] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-05-30 11:38 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-06-07 11:19 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 07/32] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-05-26 17:35 ` [PATCH v10 08/32] ARM: GIC: export and extend vgic_init_pending_irq() Andre Przywara
2017-05-26 17:35 ` [PATCH v10 09/32] ARM: vGIC: cache virtual LPI priority in struct pending_irq Andre Przywara
2017-05-26 17:35 ` [PATCH v10 10/32] ARM: vGIC: add LPI VCPU ID to " Andre Przywara
2017-05-26 17:35 ` [PATCH v10 11/32] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-05-30 11:56 ` Julien Grall
2017-05-30 22:07 ` Stefano Stabellini
2017-05-31 11:09 ` Julien Grall
2017-05-31 17:56 ` Stefano Stabellini
2017-05-31 18:39 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 12/32] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-05-30 11:58 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 13/32] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-05-26 17:35 ` [PATCH v10 14/32] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-05-26 17:35 ` [PATCH v10 15/32] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-05-26 17:35 ` [PATCH v10 16/32] ARM: vGIC: advertise LPI support Andre Przywara
2017-05-30 12:59 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 17/32] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-06-01 18:13 ` Julien Grall
2017-06-08 9:57 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 18/32] ARM: vITS: introduce translation table walks Andre Przywara
2017-06-02 16:25 ` Julien Grall
2017-06-08 9:35 ` Julien Grall
2017-06-08 9:45 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 19/32] ARM: vITS: provide access to struct pending_irq Andre Przywara
2017-06-02 16:32 ` Julien Grall
2017-06-02 16:45 ` Julien Grall
2017-06-06 10:19 ` Andre Przywara
2017-06-06 11:13 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 20/32] ARM: vITS: handle INT command Andre Przywara
2017-06-02 16:37 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 21/32] ARM: vITS: handle MAPC command Andre Przywara
2017-05-26 17:35 ` Andre Przywara [this message]
2017-06-02 16:40 ` [PATCH v10 22/32] ARM: vITS: handle CLEAR command Julien Grall
2017-05-26 17:35 ` [PATCH v10 23/32] ARM: vITS: handle MAPD command Andre Przywara
2017-06-02 16:46 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 24/32] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-06-02 16:55 ` Julien Grall
2017-06-02 20:45 ` Stefano Stabellini
2017-06-08 9:45 ` Julien Grall
2017-06-08 13:51 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 25/32] ARM: vITS: handle MAPTI/MAPI command Andre Przywara
2017-06-02 17:12 ` Julien Grall
2017-06-07 17:49 ` Andre Przywara
2017-06-12 16:33 ` Julien Grall
2017-06-09 11:17 ` Andre Przywara
2017-06-09 19:14 ` Stefano Stabellini
2017-06-12 16:10 ` Andre Przywara
2017-05-26 17:35 ` [PATCH v10 26/32] ARM: vITS: handle MOVI command Andre Przywara
2017-05-30 22:35 ` Stefano Stabellini
2017-05-31 11:23 ` Julien Grall
2017-05-31 17:53 ` Stefano Stabellini
2017-05-31 18:49 ` Julien Grall
2017-06-02 17:17 ` Julien Grall
2017-06-02 20:36 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 27/32] ARM: vITS: handle DISCARD command Andre Przywara
2017-06-02 17:21 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 28/32] ARM: vITS: handle INV command Andre Przywara
2017-05-30 22:23 ` Stefano Stabellini
2017-05-26 17:35 ` [PATCH v10 29/32] ARM: vITS: handle INVALL command Andre Przywara
2017-06-02 17:27 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 30/32] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-05-26 17:35 ` [PATCH v10 31/32] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-06-02 17:31 ` Julien Grall
2017-05-26 17:35 ` [PATCH v10 32/32] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-06-02 17:33 ` Julien Grall
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