* [PATCH] x86/msr: handle IA32_THERM_STATUS
@ 2020-10-07 10:20 Roger Pau Monne
2020-10-13 14:03 ` Jan Beulich
2020-10-14 12:17 ` Jan Beulich
0 siblings, 2 replies; 4+ messages in thread
From: Roger Pau Monne @ 2020-10-07 10:20 UTC (permalink / raw)
To: xen-devel; +Cc: Roger Pau Monne, Jan Beulich, Andrew Cooper, Wei Liu
Windows 8 will attempt to read MSR_IA32_THERM_STATUS and panic if a
#GP fault is injected as a result:
vmx.c:3035:d8v0 RDMSR 0x0000019c unimplemented
d8v0 VIRIDIAN CRASH: 3b c0000096 fffff8061de31651 fffff4088a613720 0
So handle the MSR and return 0 instead.
Note that this is done on the generic MSR handler, and PV guest will
also get 0 back when trying to read the MSR. There doesn't seem to be
much value in handling the MSR for HVM guests only.
Fixes: 84e848fd7a1 ('x86/hvm: disallow access to unknown MSRs')
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
xen/arch/x86/msr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index e4c4fa6127..190d6ac6c5 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -253,6 +253,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
break;
goto gp_fault;
+ case MSR_IA32_THERM_STATUS:
+ if ( cp->x86_vendor != X86_VENDOR_INTEL )
+ goto gp_fault;
+ *val = 0;
+ break;
+
case MSR_X2APIC_FIRST ... MSR_X2APIC_LAST:
if ( !is_hvm_domain(d) || v != curr )
goto gp_fault;
--
2.28.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/msr: handle IA32_THERM_STATUS
2020-10-07 10:20 [PATCH] x86/msr: handle IA32_THERM_STATUS Roger Pau Monne
@ 2020-10-13 14:03 ` Jan Beulich
2020-10-14 12:17 ` Jan Beulich
1 sibling, 0 replies; 4+ messages in thread
From: Jan Beulich @ 2020-10-13 14:03 UTC (permalink / raw)
To: Roger Pau Monne; +Cc: xen-devel, Andrew Cooper, Wei Liu
On 07.10.2020 12:20, Roger Pau Monne wrote:
> Windows 8 will attempt to read MSR_IA32_THERM_STATUS and panic if a
> #GP fault is injected as a result:
>
> vmx.c:3035:d8v0 RDMSR 0x0000019c unimplemented
> d8v0 VIRIDIAN CRASH: 3b c0000096 fffff8061de31651 fffff4088a613720 0
>
> So handle the MSR and return 0 instead.
>
> Note that this is done on the generic MSR handler, and PV guest will
> also get 0 back when trying to read the MSR. There doesn't seem to be
> much value in handling the MSR for HVM guests only.
>
> Fixes: 84e848fd7a1 ('x86/hvm: disallow access to unknown MSRs')
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/msr: handle IA32_THERM_STATUS
2020-10-07 10:20 [PATCH] x86/msr: handle IA32_THERM_STATUS Roger Pau Monne
2020-10-13 14:03 ` Jan Beulich
@ 2020-10-14 12:17 ` Jan Beulich
2020-10-15 11:08 ` Roger Pau Monné
1 sibling, 1 reply; 4+ messages in thread
From: Jan Beulich @ 2020-10-14 12:17 UTC (permalink / raw)
To: Roger Pau Monne; +Cc: xen-devel, Andrew Cooper, Wei Liu
On 07.10.2020 12:20, Roger Pau Monne wrote:
> --- a/xen/arch/x86/msr.c
> +++ b/xen/arch/x86/msr.c
> @@ -253,6 +253,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
> break;
> goto gp_fault;
>
> + case MSR_IA32_THERM_STATUS:
> + if ( cp->x86_vendor != X86_VENDOR_INTEL )
> + goto gp_fault;
> + *val = 0;
> + break;
I've been puzzled while applying this: The upper patch context doesn't
match what's been in master for about the last month, and hence I
wonder what version of the tree you created this patch against. In any
event please double check that I didn't screw it up.
Jan
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/msr: handle IA32_THERM_STATUS
2020-10-14 12:17 ` Jan Beulich
@ 2020-10-15 11:08 ` Roger Pau Monné
0 siblings, 0 replies; 4+ messages in thread
From: Roger Pau Monné @ 2020-10-15 11:08 UTC (permalink / raw)
To: Jan Beulich; +Cc: xen-devel, Andrew Cooper, Wei Liu
On Wed, Oct 14, 2020 at 02:17:15PM +0200, Jan Beulich wrote:
> On 07.10.2020 12:20, Roger Pau Monne wrote:
> > --- a/xen/arch/x86/msr.c
> > +++ b/xen/arch/x86/msr.c
> > @@ -253,6 +253,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
> > break;
> > goto gp_fault;
> >
> > + case MSR_IA32_THERM_STATUS:
> > + if ( cp->x86_vendor != X86_VENDOR_INTEL )
> > + goto gp_fault;
> > + *val = 0;
> > + break;
>
> I've been puzzled while applying this: The upper patch context doesn't
> match what's been in master for about the last month, and hence I
> wonder what version of the tree you created this patch against. In any
> event please double check that I didn't screw it up.
I had this applied on top of:
https://lore.kernel.org/xen-devel/20201006162327.93055-1-roger.pau@citrix.com/
Which I will reply to now because I'm not sure how to proceed there.
Thanks for fixing the context and applied.
Roger.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2020-10-13 14:03 ` Jan Beulich
2020-10-14 12:17 ` Jan Beulich
2020-10-15 11:08 ` Roger Pau Monné
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