From: Jan Beulich <jbeulich@suse.com>
To: Pu Wen <puwen@hygon.cn>, Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel@lists.xenproject.org, "Wei Liu" <wl@xen.org>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [Xen-devel] [PATCH v2] SVM: Add union intstat_t for offset 68h in vmcb struct
Date: Tue, 24 Mar 2020 12:55:35 +0100 [thread overview]
Message-ID: <8547604a-3a65-8b3a-d442-0c89ea8c15c6@suse.com> (raw)
In-Reply-To: <20200324103726.3406-1-puwen@hygon.cn>
On 24.03.2020 11:37, Pu Wen wrote:
> According to chapter "Appendix B Layout of VMCB" in the new version
> (v3.32) AMD64 APM[1], bit 1 of the VMCB offset 68h is defined as
> GUEST_INTERRUPT_MASK.
>
> In current xen codes, it use whole u64 interrupt_shadow to setup
> interrupt shadow, which will misuse other bit in VMCB offset 68h
> as part of interrupt_shadow.
>
> Add union intstat_t for VMCB offset 68h and fix codes to only use
> bit 0 as intr_shadow according to the new APM description.
>
> Reference:
> [1] https://www.amd.com/system/files/TechDocs/24593.pdf
>
> Signed-off-by: Pu Wen <puwen@hygon.cn>
Looks okay now to me (with one further nit, see below), but ...
> v1->v2:
> - Copy the whole int_stat in nsvm_vmcb_prepare4vmrun() and
> nsvm_vmcb_prepare4vmexit().
... in particular this part I'd prefer to wait a little to
whether Andrew or anyone else has a specific opinion one or
the other way.
> --- a/xen/include/asm-x86/hvm/svm/vmcb.h
> +++ b/xen/include/asm-x86/hvm/svm/vmcb.h
> @@ -316,6 +316,17 @@ typedef union
> uint64_t raw;
> } intinfo_t;
>
> +typedef union
> +{
> + struct
> + {
Nit: The brace should be on the same line as "struct"; can be
taken care of while committing.
Jan
next prev parent reply other threads:[~2020-03-24 11:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 10:37 [Xen-devel] [PATCH v2] SVM: Add union intstat_t for offset 68h in vmcb struct Pu Wen
2020-03-24 11:55 ` Jan Beulich [this message]
2020-03-25 15:21 ` Pu Wen
2020-03-24 12:28 ` Andrew Cooper
2020-03-25 15:22 ` Pu Wen
2020-03-25 15:56 ` Andrew Cooper
2020-03-26 10:16 ` Wen Pu
2020-03-25 10:30 ` Roger Pau Monné
2020-03-25 15:23 ` Pu Wen
2020-03-25 16:03 ` Andrew Cooper
2020-03-26 10:16 ` Wen Pu
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