Re: [RFC 4/8] xen/arm: gic: set_type: Pass the type in parameter rather than in desc->arch.type

[Stefano Stabellini <sstabellini@kernel.org>]

On Tue, 7 Jun 2016, Julien Grall wrote:
> A follow-up patch will not store the type in desc->arch.type. Also, the
> callback prototype is more logical.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


>  xen/arch/arm/gic-v2.c     | 3 +--
>  xen/arch/arm/gic-v3.c     | 3 +--
>  xen/arch/arm/gic.c        | 9 ++++-----
>  xen/include/asm-arm/gic.h | 4 ++--
>  4 files changed, 8 insertions(+), 11 deletions(-)
> 
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index fa2c5a5..399b869 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -200,11 +200,10 @@ static unsigned int gicv2_read_irq(void)
>      return (readl_gicc(GICC_IAR) & GICC_IA_IRQ);
>  }
>  
> -static void gicv2_set_irq_type(struct irq_desc *desc)
> +static void gicv2_set_irq_type(struct irq_desc *desc, unsigned int type)
>  {
>      uint32_t cfg, actual, edgebit;
>      unsigned int irq = desc->irq;
> -    unsigned int type = desc->arch.type;
>  
>      spin_lock(&gicv2.lock);
>      /* Set edge / level */
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
> index c25fe50..d0a7a23 100644
> --- a/xen/arch/arm/gic-v3.c
> +++ b/xen/arch/arm/gic-v3.c
> @@ -471,12 +471,11 @@ static inline uint64_t gicv3_mpidr_to_affinity(int cpu)
>               MPIDR_AFFINITY_LEVEL(mpidr, 0));
>  }
>  
> -static void gicv3_set_irq_type(struct irq_desc *desc)
> +static void gicv3_set_irq_type(struct irq_desc *desc, unsigned int type)
>  {
>      uint32_t cfg, actual, edgebit;
>      void __iomem *base;
>      unsigned int irq = desc->irq;
> -    unsigned int type = desc->arch.type;
>  
>      /* SGI's are always edge-triggered not need to call GICD_ICFGR0 */
>      ASSERT(irq >= NR_GIC_SGI);
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index 0fd7e8c..8b992d8 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -96,12 +96,12 @@ void gic_restore_state(struct vcpu *v)
>      gic_restore_pending_irqs(v);
>  }
>  
> -static void gic_set_irq_type(struct irq_desc *desc)
> +static void gic_set_irq_type(struct irq_desc *desc, unsigned int type)
>  {
>      ASSERT(spin_is_locked(&desc->lock));
> -    ASSERT(desc->arch.type != IRQ_TYPE_INVALID);
> +    ASSERT(type != IRQ_TYPE_INVALID);
>  
> -    gic_hw_ops->set_irq_type(desc);
> +    gic_hw_ops->set_irq_type(desc, type);
>  }
>  
>  static void gic_set_irq_priority(struct irq_desc *desc, unsigned int priority)
> @@ -124,7 +124,6 @@ void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
>  
>      desc->handler->set_affinity(desc, cpu_mask);
>  
> -    gic_set_irq_type(desc);
>      gic_set_irq_priority(desc, priority);
>  }
>  
> @@ -157,7 +156,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
>      desc->handler = gic_hw_ops->gic_guest_irq_type;
>      set_bit(_IRQ_GUEST, &desc->status);
>  
> -    gic_set_irq_type(desc);
> +    gic_set_irq_type(desc, desc->arch.type);
>      gic_set_irq_priority(desc, priority);
>  
>      p->desc = desc;
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index ffba469..ddc45a8 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -329,8 +329,8 @@ struct gic_hw_operations {
>      void (*deactivate_irq)(struct irq_desc *irqd);
>      /* Read IRQ id and Ack */
>      unsigned int (*read_irq)(void);
> -    /* Set IRQ type - type is taken from desc->arch.type */
> -    void (*set_irq_type)(struct irq_desc *desc);
> +    /* Set IRQ type */
> +    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
>      /* Set IRQ priority */
>      void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
>      /* Send SGI */
> -- 
> 1.9.1
> 

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