* [PATCH] x86emul: add support for missing {, V}PMADDWD insns
@ 2019-05-15 8:23 Jan Beulich
2019-05-15 8:23 ` [Xen-devel] " Jan Beulich
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Jan Beulich @ 2019-05-15 8:23 UTC (permalink / raw)
To: xen-devel; +Cc: Andrew Cooper, Wei Liu, Razvan Cojocaru, Roger Pau Monne
Their pre-AVX512 incarnations have clearly been overlooked during much
earlier work. Their memory access pattern is entirely standard, so no
specific tests get added to the harness.
Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6624,6 +6624,8 @@ x86_emulate(
case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
+ CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
+ case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 8:23 [PATCH] x86emul: add support for missing {, V}PMADDWD insns Jan Beulich
@ 2019-05-15 8:23 ` Jan Beulich
2019-05-15 9:43 ` Alexandru Stefan ISAILA
2019-05-15 10:17 ` Andrew Cooper
2 siblings, 0 replies; 10+ messages in thread
From: Jan Beulich @ 2019-05-15 8:23 UTC (permalink / raw)
To: xen-devel; +Cc: Andrew Cooper, Wei Liu, Razvan Cojocaru, Roger Pau Monne
Their pre-AVX512 incarnations have clearly been overlooked during much
earlier work. Their memory access pattern is entirely standard, so no
specific tests get added to the harness.
Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6624,6 +6624,8 @@ x86_emulate(
case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
+ CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
+ case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 8:23 [PATCH] x86emul: add support for missing {, V}PMADDWD insns Jan Beulich
2019-05-15 8:23 ` [Xen-devel] " Jan Beulich
@ 2019-05-15 9:43 ` Alexandru Stefan ISAILA
2019-05-15 9:43 ` [Xen-devel] " Alexandru Stefan ISAILA
2019-05-15 10:17 ` Andrew Cooper
2 siblings, 1 reply; 10+ messages in thread
From: Alexandru Stefan ISAILA @ 2019-05-15 9:43 UTC (permalink / raw)
To: Jan Beulich, xen-devel
Cc: Andrew Cooper, Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15.05.2019 11:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Alexandru Isaila <aisaila@bitdefender.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xenproject.org
> https://lists.xenproject.org/mailman/listinfo/xen-devel
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 9:43 ` Alexandru Stefan ISAILA
@ 2019-05-15 9:43 ` Alexandru Stefan ISAILA
0 siblings, 0 replies; 10+ messages in thread
From: Alexandru Stefan ISAILA @ 2019-05-15 9:43 UTC (permalink / raw)
To: Jan Beulich, xen-devel
Cc: Andrew Cooper, Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15.05.2019 11:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Alexandru Isaila <aisaila@bitdefender.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xenproject.org
> https://lists.xenproject.org/mailman/listinfo/xen-devel
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 8:23 [PATCH] x86emul: add support for missing {, V}PMADDWD insns Jan Beulich
2019-05-15 8:23 ` [Xen-devel] " Jan Beulich
2019-05-15 9:43 ` Alexandru Stefan ISAILA
@ 2019-05-15 10:17 ` Andrew Cooper
2019-05-15 10:17 ` [Xen-devel] " Andrew Cooper
2019-05-15 11:50 ` Jan Beulich
2 siblings, 2 replies; 10+ messages in thread
From: Andrew Cooper @ 2019-05-15 10:17 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15/05/2019 09:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
Nothing on this path checks for SSSE3, AFAICT.
~Andrew
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 10:17 ` Andrew Cooper
@ 2019-05-15 10:17 ` Andrew Cooper
2019-05-15 11:50 ` Jan Beulich
1 sibling, 0 replies; 10+ messages in thread
From: Andrew Cooper @ 2019-05-15 10:17 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15/05/2019 09:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
Nothing on this path checks for SSSE3, AFAICT.
~Andrew
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 10:17 ` Andrew Cooper
2019-05-15 10:17 ` [Xen-devel] " Andrew Cooper
@ 2019-05-15 11:50 ` Jan Beulich
2019-05-15 11:50 ` [Xen-devel] " Jan Beulich
2019-05-15 11:59 ` Andrew Cooper
1 sibling, 2 replies; 10+ messages in thread
From: Jan Beulich @ 2019-05-15 11:50 UTC (permalink / raw)
To: Andrew Cooper, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
>>> On 15.05.19 at 12:17, <andrew.cooper3@citrix.com> wrote:
> On 15/05/2019 09:23, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -6624,6 +6624,8 @@ x86_emulate(
>> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
>> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
>> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
>> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
>> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
>
> Nothing on this path checks for SSSE3, AFAICT.
Of course not - the insn first got introduced with MMX, then
promoted with SSE2 and again with AVX and AVX2.
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 11:50 ` Jan Beulich
@ 2019-05-15 11:50 ` Jan Beulich
2019-05-15 11:59 ` Andrew Cooper
1 sibling, 0 replies; 10+ messages in thread
From: Jan Beulich @ 2019-05-15 11:50 UTC (permalink / raw)
To: Andrew Cooper, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
>>> On 15.05.19 at 12:17, <andrew.cooper3@citrix.com> wrote:
> On 15/05/2019 09:23, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -6624,6 +6624,8 @@ x86_emulate(
>> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
>> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
>> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
>> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
>> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
>
> Nothing on this path checks for SSSE3, AFAICT.
Of course not - the insn first got introduced with MMX, then
promoted with SSE2 and again with AVX and AVX2.
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 11:50 ` Jan Beulich
2019-05-15 11:50 ` [Xen-devel] " Jan Beulich
@ 2019-05-15 11:59 ` Andrew Cooper
2019-05-15 11:59 ` [Xen-devel] " Andrew Cooper
1 sibling, 1 reply; 10+ messages in thread
From: Andrew Cooper @ 2019-05-15 11:59 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15/05/2019 12:50, Jan Beulich wrote:
>>>> On 15.05.19 at 12:17, <andrew.cooper3@citrix.com> wrote:
>> On 15/05/2019 09:23, Jan Beulich wrote:
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -6624,6 +6624,8 @@ x86_emulate(
>>> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
>>> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
>>> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
>>> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
>>> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
>> Nothing on this path checks for SSSE3, AFAICT.
> Of course not - the insn first got introduced with MMX, then
> promoted with SSE2 and again with AVX and AVX2.
Oh - terribly sorry - I was reading the adjacent instruction in the manual.
Sorry for the noise.
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
2019-05-15 11:59 ` Andrew Cooper
@ 2019-05-15 11:59 ` Andrew Cooper
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Cooper @ 2019-05-15 11:59 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Wei Liu, Razvan Cojocaru, Roger Pau Monne
On 15/05/2019 12:50, Jan Beulich wrote:
>>>> On 15.05.19 at 12:17, <andrew.cooper3@citrix.com> wrote:
>> On 15/05/2019 09:23, Jan Beulich wrote:
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -6624,6 +6624,8 @@ x86_emulate(
>>> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
>>> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
>>> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
>>> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
>>> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
>> Nothing on this path checks for SSSE3, AFAICT.
> Of course not - the insn first got introduced with MMX, then
> promoted with SSE2 and again with AVX and AVX2.
Oh - terribly sorry - I was reading the adjacent instruction in the manual.
Sorry for the noise.
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-05-15 11:59 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2019-05-15 8:23 [PATCH] x86emul: add support for missing {, V}PMADDWD insns Jan Beulich
2019-05-15 8:23 ` [Xen-devel] " Jan Beulich
2019-05-15 9:43 ` Alexandru Stefan ISAILA
2019-05-15 9:43 ` [Xen-devel] " Alexandru Stefan ISAILA
2019-05-15 10:17 ` Andrew Cooper
2019-05-15 10:17 ` [Xen-devel] " Andrew Cooper
2019-05-15 11:50 ` Jan Beulich
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