From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, mike.leach@linaro.org, Anshuman Khandual <anshuman.khandual@arm.com>, Linu Cherian <lcherian@marvell.com>, linux-kernel@vger.kernel.org Subject: [PATCH V2 08/11] coresight: core: Add support for dedicated percpu sinks Date: Wed, 13 Jan 2021 09:48:15 +0530 [thread overview] Message-ID: <1610511498-4058-9-git-send-email-anshuman.khandual@arm.com> (raw) In-Reply-To: <1610511498-4058-1-git-send-email-anshuman.khandual@arm.com> Add support for dedicated sinks that are bound to individual CPUs. (e.g, TRBE). To allow quicker access to the sink for a given CPU bound source, keep a percpu array of the sink devices. Also, add support for building a path to the CPU local sink from the ETM. This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. This new sink type is exclusively available and can only work with percpu source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PERCPU_PROC. This defines a percpu structure that accommodates a single coresight_device which can be used to store an initialized instance from a sink driver. As these sinks are exclusively linked and dependent on corresponding percpu sources devices, they should also be the default sink device during a perf session. Outwards device connections are scanned while establishing paths between a source and a sink device. But such connections are not present for certain percpu source and sink devices which are exclusively linked and dependent. Build the path directly and skip connection scanning for such devices. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> --- drivers/hwtracing/coresight/coresight-core.c | 14 ++++++++++++++ include/linux/coresight.h | 12 ++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0062c89..b300606 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -23,6 +23,7 @@ #include "coresight-priv.h" static DEFINE_MUTEX(coresight_mutex); +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); /** * struct coresight_node - elements of a path, from source to sink @@ -784,6 +785,13 @@ static int _coresight_build_path(struct coresight_device *csdev, if (csdev == sink) goto out; + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { + _coresight_build_path(sink, sink, path); + found = true; + goto out; + } + /* Not a sink - recursively explore each port found on this element */ for (i = 0; i < csdev->pdata->nr_outport; i++) { struct coresight_device *child_dev; @@ -998,6 +1006,12 @@ coresight_find_default_sink(struct coresight_device *csdev) { int depth = 0; + if (coresight_is_percpu_source(csdev)) { + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); + if (csdev->def_sink) + return csdev->def_sink; + } + /* look for a default sink if we have not found for this device */ if (!csdev->def_sink) csdev->def_sink = coresight_find_sink(csdev, &depth); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 267c3ac..e019182 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { CORESIGHT_DEV_SUBTYPE_SINK_PORT, CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, }; enum coresight_dev_subtype_link { @@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); } +static inline bool coresight_is_percpu_source(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && + csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC; +} + +static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && + csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM; +} #else /* !CONFIG_64BIT */ static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org Cc: mathieu.poirier@linaro.org, Anshuman Khandual <anshuman.khandual@arm.com>, suzuki.poulose@arm.com, linux-kernel@vger.kernel.org, Linu Cherian <lcherian@marvell.com>, mike.leach@linaro.org Subject: [PATCH V2 08/11] coresight: core: Add support for dedicated percpu sinks Date: Wed, 13 Jan 2021 09:48:15 +0530 [thread overview] Message-ID: <1610511498-4058-9-git-send-email-anshuman.khandual@arm.com> (raw) In-Reply-To: <1610511498-4058-1-git-send-email-anshuman.khandual@arm.com> Add support for dedicated sinks that are bound to individual CPUs. (e.g, TRBE). To allow quicker access to the sink for a given CPU bound source, keep a percpu array of the sink devices. Also, add support for building a path to the CPU local sink from the ETM. This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. This new sink type is exclusively available and can only work with percpu source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PERCPU_PROC. This defines a percpu structure that accommodates a single coresight_device which can be used to store an initialized instance from a sink driver. As these sinks are exclusively linked and dependent on corresponding percpu sources devices, they should also be the default sink device during a perf session. Outwards device connections are scanned while establishing paths between a source and a sink device. But such connections are not present for certain percpu source and sink devices which are exclusively linked and dependent. Build the path directly and skip connection scanning for such devices. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> --- drivers/hwtracing/coresight/coresight-core.c | 14 ++++++++++++++ include/linux/coresight.h | 12 ++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0062c89..b300606 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -23,6 +23,7 @@ #include "coresight-priv.h" static DEFINE_MUTEX(coresight_mutex); +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); /** * struct coresight_node - elements of a path, from source to sink @@ -784,6 +785,13 @@ static int _coresight_build_path(struct coresight_device *csdev, if (csdev == sink) goto out; + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { + _coresight_build_path(sink, sink, path); + found = true; + goto out; + } + /* Not a sink - recursively explore each port found on this element */ for (i = 0; i < csdev->pdata->nr_outport; i++) { struct coresight_device *child_dev; @@ -998,6 +1006,12 @@ coresight_find_default_sink(struct coresight_device *csdev) { int depth = 0; + if (coresight_is_percpu_source(csdev)) { + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); + if (csdev->def_sink) + return csdev->def_sink; + } + /* look for a default sink if we have not found for this device */ if (!csdev->def_sink) csdev->def_sink = coresight_find_sink(csdev, &depth); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 267c3ac..e019182 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { CORESIGHT_DEV_SUBTYPE_SINK_PORT, CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, }; enum coresight_dev_subtype_link { @@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); } +static inline bool coresight_is_percpu_source(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && + csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC; +} + +static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && + csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM; +} #else /* !CONFIG_64BIT */ static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-13 4:20 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-13 4:18 [PATCH V2 00/11] arm64: coresight: Enable ETE and TRBE Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 01/11] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 02/11] coresight: Do not scan for graph if none is present Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 03/11] coresight: etm4x: Add support for PE OS lock Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 04/11] coresight: ete: Add support for ETE sysreg access Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 05/11] coresight: ete: Add support for ETE tracing Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 06/11] dts: bindings: Document device tree bindings for ETE Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-25 19:22 ` Rob Herring 2021-01-25 19:22 ` Rob Herring 2021-01-25 22:20 ` Suzuki K Poulose 2021-01-25 22:20 ` Suzuki K Poulose 2021-01-25 23:28 ` Suzuki K Poulose 2021-01-25 23:28 ` Suzuki K Poulose 2021-01-13 4:18 ` [PATCH V2 07/11] arm64: Add TRBE definitions Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 9:21 ` Suzuki K Poulose 2021-01-13 9:21 ` Suzuki K Poulose 2021-01-15 1:52 ` Anshuman Khandual 2021-01-15 1:52 ` Anshuman Khandual 2021-02-22 13:55 ` Catalin Marinas 2021-02-22 13:55 ` Catalin Marinas 2021-02-22 13:59 ` Catalin Marinas 2021-02-22 13:59 ` Catalin Marinas 2021-01-13 4:18 ` Anshuman Khandual [this message] 2021-01-13 4:18 ` [PATCH V2 08/11] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual 2021-01-13 9:43 ` Suzuki K Poulose 2021-01-13 9:43 ` Suzuki K Poulose 2021-01-15 2:36 ` Anshuman Khandual 2021-01-15 2:36 ` Anshuman Khandual 2021-01-15 12:31 ` Suzuki K Poulose 2021-01-15 12:31 ` Suzuki K Poulose 2021-01-13 4:18 ` [PATCH V2 09/11] coresight: etm-perf: Truncate the perf record if handle has no space Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 9:48 ` Suzuki K Poulose 2021-01-13 9:48 ` Suzuki K Poulose 2021-01-13 4:18 ` [PATCH V2 10/11] coresight: sink: Add TRBE driver Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 15:28 ` Suzuki K Poulose 2021-01-13 15:28 ` Suzuki K Poulose 2021-01-15 5:29 ` Anshuman Khandual 2021-01-15 5:29 ` Anshuman Khandual 2021-01-15 12:43 ` Suzuki K Poulose 2021-01-15 12:43 ` Suzuki K Poulose 2021-01-17 12:10 ` Anshuman Khandual 2021-01-17 12:10 ` Anshuman Khandual 2021-01-13 4:18 ` [PATCH V2 11/11] dts: bindings: Document device tree bindings for Arm TRBE Anshuman Khandual 2021-01-13 4:18 ` Anshuman Khandual 2021-01-13 15:45 ` Rob Herring 2021-01-13 15:45 ` Rob Herring 2021-01-14 10:17 ` Suzuki K Poulose 2021-01-14 10:17 ` Suzuki K Poulose 2021-01-14 14:07 ` Rob Herring 2021-01-14 14:07 ` Rob Herring 2021-01-14 14:47 ` Suzuki K Poulose 2021-01-14 14:47 ` Suzuki K Poulose
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