From: Stephen Boyd <stephen.boyd@linaro.org> To: linux-usb@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Andy Gross <andy.gross@linaro.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Neil Armstrong <narmstrong@baylibre.com>, Arnd Bergmann <arnd@arndb.de>, Felipe Balbi <balbi@kernel.org>, Peter Chen <peter.chen@nxp.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org> Subject: [PATCH v4 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit Date: Wed, 7 Sep 2016 14:35:15 -0700 [thread overview] Message-ID: <20160907213519.27340-19-stephen.boyd@linaro.org> (raw) In-Reply-To: <20160907213519.27340-1-stephen.boyd@linaro.org> The MSM chipidea wrapper has two bits that are used to reset the first or second phy. Add support for these bits via the reset controller framework, so that phy drivers can reset their hardware at the right time during initialization. Acked-by: Peter Chen <peter.chen@nxp.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> --- drivers/usb/chipidea/Kconfig | 1 + drivers/usb/chipidea/ci_hdrc_msm.c | 50 ++++++++++++++++++++++++++++++++++++-- 2 files changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig index 19c20eaa23f2..fc96f5cdcb5c 100644 --- a/drivers/usb/chipidea/Kconfig +++ b/drivers/usb/chipidea/Kconfig @@ -2,6 +2,7 @@ config USB_CHIPIDEA tristate "ChipIdea Highspeed Dual Role Controller" depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA select EXTCON + select RESET_CONTROLLER help Say Y here if your system has a dual role high speed USB controller based on ChipIdea silicon IP. It supports: diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c index 2489a63d3e75..fe96df7b530c 100644 --- a/drivers/usb/chipidea/ci_hdrc_msm.c +++ b/drivers/usb/chipidea/ci_hdrc_msm.c @@ -14,6 +14,7 @@ #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/io.h> +#include <linux/reset-controller.h> #include <linux/extcon.h> #include <linux/of.h> @@ -31,8 +32,10 @@ #define HSPHY_SESS_VLD_CTRL BIT(25) /* Vendor base starts at 0x200 beyond CI base */ +#define HS_PHY_CTRL 0x0040 #define HS_PHY_SEC_CTRL 0x0078 #define HS_PHY_DIG_CLAMP_N BIT(16) +#define HS_PHY_POR_ASSERT BIT(0) struct ci_hdrc_msm { struct platform_device *ci; @@ -40,11 +43,43 @@ struct ci_hdrc_msm { struct clk *iface_clk; struct clk *fs_clk; struct ci_hdrc_platform_data pdata; + struct reset_controller_dev rcdev; bool secondary_phy; bool hsic; void __iomem *base; }; +static int +ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id) +{ + struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev); + void __iomem *addr = ci_msm->base; + u32 val; + + if (id) + addr += HS_PHY_SEC_CTRL; + else + addr += HS_PHY_CTRL; + + val = readl_relaxed(addr); + val |= HS_PHY_POR_ASSERT; + writel(val, addr); + /* + * wait for minimum 10 microseconds as suggested by manual. + * Use a slightly larger value since the exact value didn't + * work 100% of the time. + */ + udelay(12); + val &= ~HS_PHY_POR_ASSERT; + writel(val, addr); + + return 0; +} + +static const struct reset_control_ops ci_hdrc_msm_reset_ops = { + .reset = ci_hdrc_msm_por_reset, +}; + static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) { struct device *dev = ci->dev->parent; @@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) if (!ci->base) return -ENOMEM; - ret = clk_prepare_enable(ci->fs_clk); + ci->rcdev.owner = THIS_MODULE; + ci->rcdev.ops = &ci_hdrc_msm_reset_ops; + ci->rcdev.of_node = pdev->dev.of_node; + ci->rcdev.nr_resets = 2; + ret = reset_controller_register(&ci->rcdev); if (ret) return ret; + ret = clk_prepare_enable(ci->fs_clk); + if (ret) + goto err_fs; + reset_control_assert(reset); usleep_range(10000, 12000); reset_control_deassert(reset); @@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) ret = clk_prepare_enable(ci->core_clk); if (ret) - return ret; + goto err_fs; ret = clk_prepare_enable(ci->iface_clk); if (ret) @@ -236,6 +279,8 @@ err_mux: clk_disable_unprepare(ci->iface_clk); err_iface: clk_disable_unprepare(ci->core_clk); +err_fs: + reset_controller_unregister(&ci->rcdev); return ret; } @@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev) ci_hdrc_remove_device(ci->ci); clk_disable_unprepare(ci->iface_clk); clk_disable_unprepare(ci->core_clk); + reset_controller_unregister(&ci->rcdev); return 0; } -- 2.9.0.rc2.8.ga28705d
WARNING: multiple messages have this Message-ID (diff)
From: stephen.boyd@linaro.org (Stephen Boyd) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit Date: Wed, 7 Sep 2016 14:35:15 -0700 [thread overview] Message-ID: <20160907213519.27340-19-stephen.boyd@linaro.org> (raw) In-Reply-To: <20160907213519.27340-1-stephen.boyd@linaro.org> The MSM chipidea wrapper has two bits that are used to reset the first or second phy. Add support for these bits via the reset controller framework, so that phy drivers can reset their hardware at the right time during initialization. Acked-by: Peter Chen <peter.chen@nxp.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> --- drivers/usb/chipidea/Kconfig | 1 + drivers/usb/chipidea/ci_hdrc_msm.c | 50 ++++++++++++++++++++++++++++++++++++-- 2 files changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig index 19c20eaa23f2..fc96f5cdcb5c 100644 --- a/drivers/usb/chipidea/Kconfig +++ b/drivers/usb/chipidea/Kconfig @@ -2,6 +2,7 @@ config USB_CHIPIDEA tristate "ChipIdea Highspeed Dual Role Controller" depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA select EXTCON + select RESET_CONTROLLER help Say Y here if your system has a dual role high speed USB controller based on ChipIdea silicon IP. It supports: diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c index 2489a63d3e75..fe96df7b530c 100644 --- a/drivers/usb/chipidea/ci_hdrc_msm.c +++ b/drivers/usb/chipidea/ci_hdrc_msm.c @@ -14,6 +14,7 @@ #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/io.h> +#include <linux/reset-controller.h> #include <linux/extcon.h> #include <linux/of.h> @@ -31,8 +32,10 @@ #define HSPHY_SESS_VLD_CTRL BIT(25) /* Vendor base starts at 0x200 beyond CI base */ +#define HS_PHY_CTRL 0x0040 #define HS_PHY_SEC_CTRL 0x0078 #define HS_PHY_DIG_CLAMP_N BIT(16) +#define HS_PHY_POR_ASSERT BIT(0) struct ci_hdrc_msm { struct platform_device *ci; @@ -40,11 +43,43 @@ struct ci_hdrc_msm { struct clk *iface_clk; struct clk *fs_clk; struct ci_hdrc_platform_data pdata; + struct reset_controller_dev rcdev; bool secondary_phy; bool hsic; void __iomem *base; }; +static int +ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id) +{ + struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev); + void __iomem *addr = ci_msm->base; + u32 val; + + if (id) + addr += HS_PHY_SEC_CTRL; + else + addr += HS_PHY_CTRL; + + val = readl_relaxed(addr); + val |= HS_PHY_POR_ASSERT; + writel(val, addr); + /* + * wait for minimum 10 microseconds as suggested by manual. + * Use a slightly larger value since the exact value didn't + * work 100% of the time. + */ + udelay(12); + val &= ~HS_PHY_POR_ASSERT; + writel(val, addr); + + return 0; +} + +static const struct reset_control_ops ci_hdrc_msm_reset_ops = { + .reset = ci_hdrc_msm_por_reset, +}; + static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) { struct device *dev = ci->dev->parent; @@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) if (!ci->base) return -ENOMEM; - ret = clk_prepare_enable(ci->fs_clk); + ci->rcdev.owner = THIS_MODULE; + ci->rcdev.ops = &ci_hdrc_msm_reset_ops; + ci->rcdev.of_node = pdev->dev.of_node; + ci->rcdev.nr_resets = 2; + ret = reset_controller_register(&ci->rcdev); if (ret) return ret; + ret = clk_prepare_enable(ci->fs_clk); + if (ret) + goto err_fs; + reset_control_assert(reset); usleep_range(10000, 12000); reset_control_deassert(reset); @@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) ret = clk_prepare_enable(ci->core_clk); if (ret) - return ret; + goto err_fs; ret = clk_prepare_enable(ci->iface_clk); if (ret) @@ -236,6 +279,8 @@ err_mux: clk_disable_unprepare(ci->iface_clk); err_iface: clk_disable_unprepare(ci->core_clk); +err_fs: + reset_controller_unregister(&ci->rcdev); return ret; } @@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev) ci_hdrc_remove_device(ci->ci); clk_disable_unprepare(ci->iface_clk); clk_disable_unprepare(ci->core_clk); + reset_controller_unregister(&ci->rcdev); return 0; } -- 2.9.0.rc2.8.ga28705d
next prev parent reply other threads:[~2016-09-07 21:35 UTC|newest] Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-07 21:34 [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Stephen Boyd 2016-09-07 21:34 ` Stephen Boyd 2016-09-07 21:34 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias, uvent_modalias} to modules Stephen Boyd 2016-09-07 21:34 ` Stephen Boyd 2016-09-07 21:34 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} " Stephen Boyd 2016-09-08 0:58 ` Rob Herring 2016-09-08 0:58 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias, uvent_modalias} " Rob Herring 2016-09-08 0:58 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} " Rob Herring 2016-09-07 21:35 ` [PATCH v4 03/22] usb: ulpi: Support device discovery via DT Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd [not found] ` <20160907213519.27340-4-stephen.boyd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2016-09-08 1:12 ` Rob Herring 2016-09-08 1:12 ` Rob Herring 2016-09-08 1:12 ` Rob Herring 2016-09-08 1:54 ` Stephen Boyd 2016-09-08 1:54 ` Stephen Boyd 2016-09-12 22:05 ` Stephen Boyd 2016-09-12 22:05 ` Stephen Boyd 2016-09-12 22:05 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 04/22] usb: chipidea: Only read/write OTGSC from one place Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 05/22] usb: chipidea: Handle extcon events properly Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 06/22] usb: chipidea: Add platform flag for wrapper phy management Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 07/22] usb: chipidea: Notify events when switching host mode Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 08/22] usb: chipidea: Remove locking in ci_udc_start() Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 09/22] usb: chipidea: Add support for ULPI PHY bus Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 10/22] usb: chipidea: Consolidate extcon notifiers Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-08 1:23 ` Peter Chen 2016-09-08 1:23 ` Peter Chen 2016-09-07 21:35 ` [PATCH v4 12/22] usb: chipidea: msm: Rely on core to override AHBBURST Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 15/22] usb: chipidea: msm: Mux over secondary phy at the right time Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd [this message] 2016-09-07 21:35 ` [PATCH v4 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 19/22] usb: chipidea: msm: Handle phy power states Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd [not found] ` <20160907213519.27340-1-stephen.boyd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2016-09-07 21:34 ` [PATCH v4 01/22] of: device: Support loading a module with OF based modalias Stephen Boyd 2016-09-07 21:34 ` Stephen Boyd 2016-09-07 21:34 ` Stephen Boyd 2016-09-08 0:58 ` Rob Herring 2016-09-08 0:58 ` Rob Herring 2016-09-08 0:58 ` Rob Herring 2016-09-07 21:35 ` [PATCH v4 11/22] usb: chipidea: msm: Mark device as runtime pm active Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 14/22] usb: chipidea: msm: Add proper clk and reset support Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 16/22] usb: chipidea: msm: Restore wrapper settings after reset Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 17/22] usb: chipidea: msm: Make platform data driver local instead of global Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 20/22] usb: chipidea: msm: Be silent on probe defer errors Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` [PATCH v4 21/22] phy: Add support for Qualcomm's USB HSIC phy Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-16 14:21 ` Rob Herring 2016-09-16 14:21 ` Rob Herring 2016-09-07 21:35 ` [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-07 21:35 ` Stephen Boyd 2016-09-13 7:03 ` Peter Chen 2016-09-13 7:03 ` Peter Chen 2016-09-13 20:41 ` Stephen Boyd 2016-09-13 20:41 ` Stephen Boyd 2016-09-14 2:11 ` Peter Chen 2016-09-14 2:11 ` Peter Chen 2016-09-14 2:11 ` Peter Chen 2016-09-14 6:29 ` Stephen Boyd 2016-09-14 6:29 ` Stephen Boyd 2016-09-14 9:33 ` Peter Chen 2016-09-14 9:33 ` Peter Chen 2016-09-14 17:42 ` Stephen Boyd 2016-09-14 17:42 ` Stephen Boyd 2016-09-15 5:29 ` Peter Chen 2016-09-15 5:29 ` Peter Chen [not found] ` <20160910121857.GB11271@a0393678ub> 2016-09-14 5:29 ` Kishon Vijay Abraham I 2016-09-14 5:29 ` Kishon Vijay Abraham I 2016-09-14 5:29 ` Kishon Vijay Abraham I 2016-09-16 15:19 ` Rob Herring 2016-09-16 15:19 ` Rob Herring 2016-09-17 0:05 ` Stephen Boyd 2016-09-17 0:05 ` Stephen Boyd 2016-09-19 21:01 ` Rob Herring 2016-09-19 21:01 ` Rob Herring 2016-09-19 21:01 ` Rob Herring 2016-09-08 2:06 ` [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Peter Chen 2016-09-08 2:06 ` Peter Chen 2016-09-08 2:06 ` Peter Chen 2016-09-08 21:13 ` Stephen Boyd 2016-09-08 21:13 ` Stephen Boyd 2016-09-09 0:45 ` Peter Chen 2016-09-09 0:45 ` Peter Chen 2016-09-09 0:45 ` Peter Chen
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