From: Peter Chen <hzpeterchen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Stephen Boyd <stephen.boyd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Bjorn Andersson
<bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Neil Armstrong
<narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Felipe Balbi <balbi-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Peter Chen <peter.chen-3arQi8VN3Tc@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Fabien Lahoudere
<fabien.lahoudere-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org>
Subject: Re: [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy
Date: Wed, 14 Sep 2016 10:11:33 +0800 [thread overview]
Message-ID: <20160914021133.GB30760@b29397-desktop> (raw)
In-Reply-To: <147379930484.27460.3849356366746983941@sboyd-linaro>
On Tue, Sep 13, 2016 at 01:41:44PM -0700, Stephen Boyd wrote:
> Quoting Peter Chen (2016-09-13 00:03:58)
> > On Wed, Sep 07, 2016 at 02:35:19PM -0700, Stephen Boyd wrote:
> > > The high-speed phy on qcom SoCs is controlled via the ULPI
> > > viewport.
> > >
> >
> > Hi Stephen, I am a little puzzled how this driver co-work with chipidea
> > driver. According to nxp IC guys, the ULPI PHY's clock needs to be enabled
> > before access portsc.pts (calling hw_phymode_configure), otherwise,
> > the system will hang. But I find you call hw_phymode_configure before
> > phy->power_on, doesn't your design have this requirement?
>
> Which clk needs to be enabled? The xcvr_clk? I believe that clk
> corresponds to the "core" clk that we enable in the msm glue driver
> layer. When that clk is enabled, the ULPI phy is able to respond to
> register read/writes via the ULPI viewport.
>
The input clock for ULPI PHY, maybe it is ref_clk at this PHY driver,
so in your platform, even PHY clock is gated, you can still access
portsc.pts to configure PHY mode at controller register?
> >
> > Besides, you read ulpi id before phy->power_on, how can read work before
> > phy power on?
> >
>
> I've found that even having the link clk enabled before phy->power_on
> doesn't mean it's possible to read the id registers though. That's
> because there can be other power supplies, like regulators, which need
> to be on for the phy to operate properly.
>
Then I am puzzled the current initialization for your case, in my mind,
it should like below:
qcom_usb_hs_phy_probe->qcom_usb_hs_phy_power_on->ci_ulpi_init
Like other PHYs, it should get PHY first, then power on it, after that,
you can access its register.
--
Best Regards,
Peter Chen
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WARNING: multiple messages have this Message-ID (diff)
From: Peter Chen <hzpeterchen@gmail.com>
To: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Andy Gross <andy.gross@linaro.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Arnd Bergmann <arnd@arndb.de>, Felipe Balbi <balbi@kernel.org>,
Peter Chen <peter.chen@nxp.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
devicetree@vger.kernel.org,
Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Subject: Re: [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy
Date: Wed, 14 Sep 2016 10:11:33 +0800 [thread overview]
Message-ID: <20160914021133.GB30760@b29397-desktop> (raw)
In-Reply-To: <147379930484.27460.3849356366746983941@sboyd-linaro>
On Tue, Sep 13, 2016 at 01:41:44PM -0700, Stephen Boyd wrote:
> Quoting Peter Chen (2016-09-13 00:03:58)
> > On Wed, Sep 07, 2016 at 02:35:19PM -0700, Stephen Boyd wrote:
> > > The high-speed phy on qcom SoCs is controlled via the ULPI
> > > viewport.
> > >
> >
> > Hi Stephen, I am a little puzzled how this driver co-work with chipidea
> > driver. According to nxp IC guys, the ULPI PHY's clock needs to be enabled
> > before access portsc.pts (calling hw_phymode_configure), otherwise,
> > the system will hang. But I find you call hw_phymode_configure before
> > phy->power_on, doesn't your design have this requirement?
>
> Which clk needs to be enabled? The xcvr_clk? I believe that clk
> corresponds to the "core" clk that we enable in the msm glue driver
> layer. When that clk is enabled, the ULPI phy is able to respond to
> register read/writes via the ULPI viewport.
>
The input clock for ULPI PHY, maybe it is ref_clk at this PHY driver,
so in your platform, even PHY clock is gated, you can still access
portsc.pts to configure PHY mode at controller register?
> >
> > Besides, you read ulpi id before phy->power_on, how can read work before
> > phy power on?
> >
>
> I've found that even having the link clk enabled before phy->power_on
> doesn't mean it's possible to read the id registers though. That's
> because there can be other power supplies, like regulators, which need
> to be on for the phy to operate properly.
>
Then I am puzzled the current initialization for your case, in my mind,
it should like below:
qcom_usb_hs_phy_probe->qcom_usb_hs_phy_power_on->ci_ulpi_init
Like other PHYs, it should get PHY first, then power on it, after that,
you can access its register.
--
Best Regards,
Peter Chen
WARNING: multiple messages have this Message-ID (diff)
From: hzpeterchen@gmail.com (Peter Chen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy
Date: Wed, 14 Sep 2016 10:11:33 +0800 [thread overview]
Message-ID: <20160914021133.GB30760@b29397-desktop> (raw)
In-Reply-To: <147379930484.27460.3849356366746983941@sboyd-linaro>
On Tue, Sep 13, 2016 at 01:41:44PM -0700, Stephen Boyd wrote:
> Quoting Peter Chen (2016-09-13 00:03:58)
> > On Wed, Sep 07, 2016 at 02:35:19PM -0700, Stephen Boyd wrote:
> > > The high-speed phy on qcom SoCs is controlled via the ULPI
> > > viewport.
> > >
> >
> > Hi Stephen, I am a little puzzled how this driver co-work with chipidea
> > driver. According to nxp IC guys, the ULPI PHY's clock needs to be enabled
> > before access portsc.pts (calling hw_phymode_configure), otherwise,
> > the system will hang. But I find you call hw_phymode_configure before
> > phy->power_on, doesn't your design have this requirement?
>
> Which clk needs to be enabled? The xcvr_clk? I believe that clk
> corresponds to the "core" clk that we enable in the msm glue driver
> layer. When that clk is enabled, the ULPI phy is able to respond to
> register read/writes via the ULPI viewport.
>
The input clock for ULPI PHY, maybe it is ref_clk at this PHY driver,
so in your platform, even PHY clock is gated, you can still access
portsc.pts to configure PHY mode at controller register?
> >
> > Besides, you read ulpi id before phy->power_on, how can read work before
> > phy power on?
> >
>
> I've found that even having the link clk enabled before phy->power_on
> doesn't mean it's possible to read the id registers though. That's
> because there can be other power supplies, like regulators, which need
> to be on for the phy to operate properly.
>
Then I am puzzled the current initialization for your case, in my mind,
it should like below:
qcom_usb_hs_phy_probe->qcom_usb_hs_phy_power_on->ci_ulpi_init
Like other PHYs, it should get PHY first, then power on it, after that,
you can access its register.
--
Best Regards,
Peter Chen
next prev parent reply other threads:[~2016-09-14 2:11 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-07 21:34 [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Stephen Boyd
2016-09-07 21:34 ` Stephen Boyd
2016-09-07 21:34 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias, uvent_modalias} to modules Stephen Boyd
2016-09-07 21:34 ` Stephen Boyd
2016-09-07 21:34 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} " Stephen Boyd
2016-09-08 0:58 ` Rob Herring
2016-09-08 0:58 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias, uvent_modalias} " Rob Herring
2016-09-08 0:58 ` [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} " Rob Herring
2016-09-07 21:35 ` [PATCH v4 03/22] usb: ulpi: Support device discovery via DT Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
[not found] ` <20160907213519.27340-4-stephen.boyd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-09-08 1:12 ` Rob Herring
2016-09-08 1:12 ` Rob Herring
2016-09-08 1:12 ` Rob Herring
2016-09-08 1:54 ` Stephen Boyd
2016-09-08 1:54 ` Stephen Boyd
2016-09-12 22:05 ` Stephen Boyd
2016-09-12 22:05 ` Stephen Boyd
2016-09-12 22:05 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 04/22] usb: chipidea: Only read/write OTGSC from one place Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 05/22] usb: chipidea: Handle extcon events properly Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 06/22] usb: chipidea: Add platform flag for wrapper phy management Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 07/22] usb: chipidea: Notify events when switching host mode Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 08/22] usb: chipidea: Remove locking in ci_udc_start() Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 09/22] usb: chipidea: Add support for ULPI PHY bus Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 10/22] usb: chipidea: Consolidate extcon notifiers Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-08 1:23 ` Peter Chen
2016-09-08 1:23 ` Peter Chen
2016-09-07 21:35 ` [PATCH v4 12/22] usb: chipidea: msm: Rely on core to override AHBBURST Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 15/22] usb: chipidea: msm: Mux over secondary phy at the right time Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 19/22] usb: chipidea: msm: Handle phy power states Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
[not found] ` <20160907213519.27340-1-stephen.boyd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-09-07 21:34 ` [PATCH v4 01/22] of: device: Support loading a module with OF based modalias Stephen Boyd
2016-09-07 21:34 ` Stephen Boyd
2016-09-07 21:34 ` Stephen Boyd
2016-09-08 0:58 ` Rob Herring
2016-09-08 0:58 ` Rob Herring
2016-09-08 0:58 ` Rob Herring
2016-09-07 21:35 ` [PATCH v4 11/22] usb: chipidea: msm: Mark device as runtime pm active Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 14/22] usb: chipidea: msm: Add proper clk and reset support Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 16/22] usb: chipidea: msm: Restore wrapper settings after reset Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 17/22] usb: chipidea: msm: Make platform data driver local instead of global Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 20/22] usb: chipidea: msm: Be silent on probe defer errors Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` [PATCH v4 21/22] phy: Add support for Qualcomm's USB HSIC phy Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-16 14:21 ` Rob Herring
2016-09-16 14:21 ` Rob Herring
2016-09-07 21:35 ` [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-07 21:35 ` Stephen Boyd
2016-09-13 7:03 ` Peter Chen
2016-09-13 7:03 ` Peter Chen
2016-09-13 20:41 ` Stephen Boyd
2016-09-13 20:41 ` Stephen Boyd
2016-09-14 2:11 ` Peter Chen [this message]
2016-09-14 2:11 ` Peter Chen
2016-09-14 2:11 ` Peter Chen
2016-09-14 6:29 ` Stephen Boyd
2016-09-14 6:29 ` Stephen Boyd
2016-09-14 9:33 ` Peter Chen
2016-09-14 9:33 ` Peter Chen
2016-09-14 17:42 ` Stephen Boyd
2016-09-14 17:42 ` Stephen Boyd
2016-09-15 5:29 ` Peter Chen
2016-09-15 5:29 ` Peter Chen
[not found] ` <20160910121857.GB11271@a0393678ub>
2016-09-14 5:29 ` Kishon Vijay Abraham I
2016-09-14 5:29 ` Kishon Vijay Abraham I
2016-09-14 5:29 ` Kishon Vijay Abraham I
2016-09-16 15:19 ` Rob Herring
2016-09-16 15:19 ` Rob Herring
2016-09-17 0:05 ` Stephen Boyd
2016-09-17 0:05 ` Stephen Boyd
2016-09-19 21:01 ` Rob Herring
2016-09-19 21:01 ` Rob Herring
2016-09-19 21:01 ` Rob Herring
2016-09-08 2:06 ` [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Peter Chen
2016-09-08 2:06 ` Peter Chen
2016-09-08 2:06 ` Peter Chen
2016-09-08 21:13 ` Stephen Boyd
2016-09-08 21:13 ` Stephen Boyd
2016-09-09 0:45 ` Peter Chen
2016-09-09 0:45 ` Peter Chen
2016-09-09 0:45 ` Peter Chen
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