All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mark Brown <broonie@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	tudor.ambarus@microchip.com, linux-kernel@vger.kernel.org,
	chenxiang66@hisilicon.com, linuxarm@huawei.com,
	linux-spi@vger.kernel.org, marek.vasut@gmail.com,
	linux-mtd@lists.infradead.org, xuejiancheng@hisilicon.com,
	fengsheng5@huawei.com,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	liusimin4@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 14:06:27 +0000	[thread overview]
Message-ID: <20200113140627.GJ3897@sirena.org.uk> (raw)
In-Reply-To: <6dd45da9-9ccf-45f7-ed12-8f1406a0a56b@huawei.com>

[-- Attachment #1: Type: text/plain, Size: 1056 bytes --]

On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> On 13/01/2020 11:42, Mark Brown wrote:

> > The idiomatic approach appears to be for individual board vendors
> > to allocate IDs, you do end up with multiple IDs from multiple
> > vendors for the same thing.

> But I am not sure how appropriate that same approach would be for some 3rd
> party memory part which we're simply wiring up on our board. Maybe it is.

It seems to be quite common for Intel reference designs to assign
Intel IDs to non-Intel parts on the board (which is where I
became aware of this practice).  

> > In general there's not really much standardizaiton for devices,
> > the bindings that do exist aren't really centrally documented and
> > the Windows standard is just to have the basic device
> > registration in the firmware and do all properties based on
> > quirking based on DMI information.

> OK, so there is always DMI. I hoped to avoid this sort of thing in the linux
> driver :)

Yes, there are some merits to an approach like that.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: chenxiang66@hisilicon.com, linux-kernel@vger.kernel.org,
	tudor.ambarus@microchip.com, liusimin4@huawei.com,
	linuxarm@huawei.com, linux-spi@vger.kernel.org,
	marek.vasut@gmail.com, linux-mtd@lists.infradead.org,
	xuejiancheng@hisilicon.com,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 14:06:27 +0000	[thread overview]
Message-ID: <20200113140627.GJ3897@sirena.org.uk> (raw)
In-Reply-To: <6dd45da9-9ccf-45f7-ed12-8f1406a0a56b@huawei.com>


[-- Attachment #1.1: Type: text/plain, Size: 1056 bytes --]

On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> On 13/01/2020 11:42, Mark Brown wrote:

> > The idiomatic approach appears to be for individual board vendors
> > to allocate IDs, you do end up with multiple IDs from multiple
> > vendors for the same thing.

> But I am not sure how appropriate that same approach would be for some 3rd
> party memory part which we're simply wiring up on our board. Maybe it is.

It seems to be quite common for Intel reference designs to assign
Intel IDs to non-Intel parts on the board (which is where I
became aware of this practice).  

> > In general there's not really much standardizaiton for devices,
> > the bindings that do exist aren't really centrally documented and
> > the Windows standard is just to have the basic device
> > registration in the firmware and do all properties based on
> > quirking based on DMI information.

> OK, so there is always DMI. I hoped to avoid this sort of thing in the linux
> driver :)

Yes, there are some merits to an approach like that.

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[-- Attachment #2: Type: text/plain, Size: 144 bytes --]

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2020-01-13 14:06 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2019-12-09 14:08   ` John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2020-01-16 11:03     ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 15:54     ` John Garry
2020-01-09 21:28     ` Mark Brown
2020-01-09 21:28       ` Mark Brown
2020-01-10 11:55       ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 14:07         ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:58           ` John Garry
2020-01-10 14:58             ` John Garry
2020-01-10 15:12             ` Mark Brown
2020-01-10 15:12               ` Mark Brown
2020-01-10 16:09               ` John Garry
2020-01-10 16:09                 ` John Garry
2020-01-10 19:31             ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-13 10:09               ` John Garry
2020-01-13 10:09                 ` John Garry
2020-01-13 11:42                 ` Mark Brown
2020-01-13 11:42                   ` Mark Brown
2020-01-13 13:01                   ` John Garry
2020-01-13 13:01                     ` John Garry
2020-01-13 14:06                     ` Mark Brown [this message]
2020-01-13 14:06                       ` Mark Brown
2020-01-13 14:17                       ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:27                         ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:34                           ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-31 10:08                             ` John Garry
2020-01-31 10:08                               ` John Garry
2020-01-31 11:39                               ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 12:03                                 ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 15:46                                   ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 16:26                                     ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-02-01 11:34                                       ` Mark Brown
2020-02-01 11:34                                         ` Mark Brown
2020-02-01 11:32                                     ` Mark Brown
2020-02-01 11:32                                       ` Mark Brown
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-10 19:59   ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:52   ` John Garry
2019-12-16 14:56   ` Mark Brown
2019-12-16 14:56     ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200113140627.GJ3897@sirena.org.uk \
    --to=broonie@kernel.org \
    --cc=andriy.shevchenko@linux.intel.com \
    --cc=chenxiang66@hisilicon.com \
    --cc=fengsheng5@huawei.com \
    --cc=john.garry@huawei.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=liusimin4@huawei.com \
    --cc=marek.vasut@gmail.com \
    --cc=mika.westerberg@linux.intel.com \
    --cc=tudor.ambarus@microchip.com \
    --cc=wanghuiqiang@huawei.com \
    --cc=xuejiancheng@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.