From: Siew Chin Lim <elly.siew.chin.lim@intel.com>
To: u-boot@lists.denx.de
Subject: [v2, 09/16] mmc: dwmmc: socfpga: Add ATF support for MMC driver
Date: Thu, 1 Oct 2020 02:16:07 -0700 [thread overview]
Message-ID: <20201001091614.184612-10-elly.siew.chin.lim@intel.com> (raw)
In-Reply-To: <20201001091614.184612-1-elly.siew.chin.lim@intel.com>
From: Chee Hong Ang <chee.hong.ang@intel.com>
In non-secure mode (EL2), MMC driver calls the SMC/PSCI services
provided by ATF to set SDMMC's DRVSEL and SMPLSEL.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
---
v2:
- Code clean up without functionality change:
- Changed socfpga_dwmci_fw_clksel() to socfpga_dwmci_do_clksel().
This function will be called in both legacy and ATF boot flow.
- Move #ifdef .. #endif switch into socfpga_dwmci_do_clksel().
- Remove #ifdef .. #endif switch from socfpga_dwmci_clksel(),
Directly call socfpga_dwmci_do_clksel() in socfpga_dwmci_clksel().
---
drivers/mmc/socfpga_dw_mmc.c | 26 +++++++++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 0022f943bd..404dd2c91a 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <log.h>
#include <asm/arch/clock_manager.h>
+#include <asm/arch/smc_api.h>
#include <asm/arch/system_manager.h>
#include <clk.h>
#include <dm.h>
@@ -13,6 +14,7 @@
#include <errno.h>
#include <fdtdec.h>
#include <dm/device_compat.h>
+#include <linux/intel-smc.h>
#include <linux/libfdt.h>
#include <linux/err.h>
#include <malloc.h>
@@ -46,6 +48,26 @@ static void socfpga_dwmci_reset(struct udevice *dev)
reset_deassert_bulk(&reset_bulk);
}
+static void socfpga_dwmci_do_clksel(u32 sdmmc_mask)
+{
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
+ u64 args[2];
+
+ /* drvsel */
+ args[0] = (sdmmc_mask >> SYSMGR_SDMMC_DRVSEL_SHIFT) & 0x7;
+ /* smplsel */
+ args[1] = (sdmmc_mask >> SYSMGR_SDMMC_SMPLSEL_SHIFT) & 0x7;
+ if (invoke_smc(INTEL_SIP_SMC_HPS_SET_SDMMC_CCLK, args, 2, NULL, 0))
+ dev_err(host->dev, "SMC call failed in %s\n", __func__);
+
+#else
+ writel(sdmmc_mask, socfpga_get_sysmgr_addr() + SYSMGR_SDMMC);
+
+ debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__,
+ readl(socfpga_get_sysmgr_addr() + SYSMGR_SDMMC));
+#endif
+}
+
static void socfpga_dwmci_clksel(struct dwmci_host *host)
{
struct dwmci_socfpga_priv_data *priv = host->priv;
@@ -58,10 +80,8 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host)
debug("%s: drvsel %d smplsel %d\n", __func__,
priv->drvsel, priv->smplsel);
- writel(sdmmc_mask, socfpga_get_sysmgr_addr() + SYSMGR_SDMMC);
- debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__,
- readl(socfpga_get_sysmgr_addr() + SYSMGR_SDMMC));
+ socfpga_dwmci_do_clksel(sdmmc_mask);
/* Enable SDMMC clock */
setbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_PERPLL_EN,
--
2.13.0
next prev parent reply other threads:[~2020-10-01 9:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 9:15 [v2, 00/16] Enable ARM Trusted Firmware for U-Boot Siew Chin Lim
2020-10-01 9:15 ` [v2, 01/16] arm: socfpga: soc64: Remove CONFIG_OF_EMBED Siew Chin Lim
2020-10-01 9:16 ` [v2, 02/16] arm: socfpga: soc64: Add FIT generator script for pack itb with ATF Siew Chin Lim
2020-10-01 9:16 ` [v2, 03/16] arm: socfpga: Add function for checking description from FIT image Siew Chin Lim
2020-10-01 9:16 ` [v2, 04/16] arm: socfpga: soc64: Load FIT image with ATF support Siew Chin Lim
2020-10-01 9:16 ` [v2, 05/16] arm: socfpga: soc64: Override 'lowlevel_init' to support ATF Siew Chin Lim
2020-10-01 9:16 ` [v2, 06/16] arm: socfpga: Disable "spin-table" method for booting Linux Siew Chin Lim
2020-10-01 9:16 ` [v2, 07/16] arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits) Siew Chin Lim
2020-10-01 9:16 ` [v2, 08/16] arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services Siew Chin Lim
2020-10-01 9:16 ` Siew Chin Lim [this message]
2020-10-01 9:16 ` [v2, 10/16] net: designware: socfpga: Add ATF support for MAC driver Siew Chin Lim
2020-10-01 9:16 ` [v2, 11/16] arm: socfpga: soc64: Add ATF support for Reset Manager driver Siew Chin Lim
2020-10-01 9:16 ` [v2, 12/16] arm: socfpga: soc64: Add ATF support for FPGA reconfig driver Siew Chin Lim
2020-10-01 9:16 ` [v2, 13/16] arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() Siew Chin Lim
2020-10-01 9:16 ` [v2, 14/16] arm: socfpga: soc64: SSBL shall not setup stack on OCRAM Siew Chin Lim
2020-10-01 9:16 ` [v2, 15/16] arm: socfpga: soc64: Skip handoff data access in SSBL Siew Chin Lim
2020-10-01 9:16 ` [v2, 16/16] configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support Siew Chin Lim
2020-10-01 16:52 ` [v2, 00/16] Enable ARM Trusted Firmware for U-Boot Michal Simek
2020-10-01 18:37 ` Simon Glass
2020-10-01 18:48 ` Marek Vasut
2020-10-01 20:33 ` Tom Rini
2020-10-01 21:46 ` Simon Glass
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