Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash

From: zhengxunli@mxic.com.tw
To: <Tudor.Ambarus@microchip.com>
Cc: broonie@kernel.org, jaimeliao@mxic.com.tw,
	linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
	miquel.raynal@bootlin.com, p.yadav@ti.com
Subject: Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix octaflash
Date: Tue, 29 Jun 2021 17:33:17 +0800	[thread overview]
Message-ID: <OF0F03D74E.5813696B-ON48258703.003378F0-48258703.00347C73@mxic.com.tw> (raw)
In-Reply-To: <59855ba0-31d8-25b4-3000-ca493a83fe00@microchip.com>

Hi Tudor,

<Tudor.Ambarus@microchip.com> wrote on 2021/06/29 下午 02:37:01:

> <Tudor.Ambarus@microchip.com> 
> 2021/06/29 下午 02:37
> 
> To
> 
> <zhengxunli@mxic.com.tw>, <linux-mtd@lists.infradead.org>, <linux-
> spi@vger.kernel.org>, 
> 
> cc
> 
> <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <broonie@kernel.org>,
> <jaimeliao@mxic.com.tw>
> 
> Subject
> 
> Re: [PATCH v5 1/2] mtd: spi-nor: macronix: add support for Macronix 
octaflash
> 
> On 5/17/21 9:14 AM, Zhengxun Li wrote:
> > +       { "mx66lm1g45g", INFO(0xc2853b, 0, 32 * 1024, 4096,
> > +                             SECT_4K | SPI_NOR_OCTAL_DTR_READ |
> > +                             SPI_NOR_OCTAL_DTR_PP | 
SPI_NOR_4B_OPCODES)
> > +               .fixups = &octaflash_fixups },
> 
> I have a mx66lm1g45g which does not define SFDP tables, how you'll 
> differentiate
> between the two? 
> Mine will fail after reset. I'm working to address 
> the flash ID
> collisions, will send patches soon. I won't queue any new flash 
> additions until
> we'll solve the ID collisions problem.

Sorry for the inconvenience. I will discuss with our flash team as soon as 
possible.

Thanks,
Zhengxun

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