* [GIT PULL] Renesas ARM Based SoC Updates for v5.3
@ 2019-06-21 9:12 Simon Horman
2019-06-21 9:12 ` [PATCH 1/2] ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available Simon Horman
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Simon Horman @ 2019-06-21 9:12 UTC (permalink / raw)
To: arm
Cc: Arnd Bergmann, Kevin Hilman, Magnus Damm, linux-renesas-soc,
Olof Johansson, Simon Horman, linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC updates for v5.3.
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm-soc-for-v5.3
for you to fetch changes up to 02af9f90941b6cce5fb672ee058c142adcc11a2f:
soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M (2019-06-06 10:37:06 +0200)
----------------------------------------------------------------
Renesas ARM Based SoC Updates for v5.3
* Auto-enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
* Don't init CNTVOFF/counter if PSCI is available
----------------------------------------------------------------
Geert Uytterhoeven (1):
soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
Oleksandr Tyshchenko (1):
ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
arch/arm/mach-shmobile/setup-rcar-gen2.c | 17 +++++++++++++++++
drivers/soc/renesas/Kconfig | 4 +++-
2 files changed, 20 insertions(+), 1 deletion(-)
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
2019-06-21 9:12 [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Simon Horman
@ 2019-06-21 9:12 ` Simon Horman
2019-06-21 9:12 ` [PATCH 2/2] soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M Simon Horman
2019-06-25 12:49 ` [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Olof Johansson
2 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2019-06-21 9:12 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Oleksandr Tyshchenko, Magnus Damm, linux-arm-kernel, Simon Horman
From: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.
As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.
Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.
Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/setup-rcar-gen2.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index eea60b20c6b4..9e4bc1865f84 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -17,6 +17,7 @@
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
+#include <linux/psci.h>
#include <asm/mach/arch.h>
#include <asm/secure_cntvoff.h>
#include "common.h"
@@ -60,9 +61,24 @@ static unsigned int __init get_extal_freq(void)
void __init rcar_gen2_timer_init(void)
{
+ bool need_update = true;
void __iomem *base;
u32 freq;
+ /*
+ * If PSCI is available then most likely we are running on PSCI-enabled
+ * U-Boot which, we assume, has already taken care of resetting CNTVOFF
+ * and updating counter module before switching to non-secure mode
+ * and we don't need to.
+ */
+#ifdef CONFIG_ARM_PSCI_FW
+ if (psci_ops.cpu_on)
+ need_update = false;
+#endif
+
+ if (need_update == false)
+ goto skip_update;
+
secure_cntvoff_init();
if (of_machine_is_compatible("renesas,r8a7745") ||
@@ -102,6 +118,7 @@ void __init rcar_gen2_timer_init(void)
iounmap(base);
+skip_update:
of_clk_init(NULL);
timer_probe();
}
--
2.11.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
2019-06-21 9:12 [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Simon Horman
2019-06-21 9:12 ` [PATCH 1/2] ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available Simon Horman
@ 2019-06-21 9:12 ` Simon Horman
2019-06-25 12:49 ` [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Olof Johansson
2 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2019-06-21 9:12 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Simon Horman, Magnus Damm, Geert Uytterhoeven, linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Auto-enable support for the RZ/A1 Interrupt Controller when configuring
a kernel which supports RZ/A1H or RZ/A2M SoCs.
Keep selects sorted while at it.
This is similar to how interrupt controllers for other Renesas SoCs are
enabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/Kconfig | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 68bfca6f20dd..2bbf49e5d441 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -57,14 +57,16 @@ config ARCH_R7S72100
bool "RZ/A1H (R7S72100)"
select PM
select PM_GENERIC_DOMAINS
- select SYS_SUPPORTS_SH_MTU2
select RENESAS_OSTM
+ select RENESAS_RZA1_IRQC
+ select SYS_SUPPORTS_SH_MTU2
config ARCH_R7S9210
bool "RZ/A2 (R7S9210)"
select PM
select PM_GENERIC_DOMAINS
select RENESAS_OSTM
+ select RENESAS_RZA1_IRQC
config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
--
2.11.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [GIT PULL] Renesas ARM Based SoC Updates for v5.3
2019-06-21 9:12 [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Simon Horman
2019-06-21 9:12 ` [PATCH 1/2] ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available Simon Horman
2019-06-21 9:12 ` [PATCH 2/2] soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M Simon Horman
@ 2019-06-25 12:49 ` Olof Johansson
2019-06-25 13:23 ` Geert Uytterhoeven
2 siblings, 1 reply; 6+ messages in thread
From: Olof Johansson @ 2019-06-25 12:49 UTC (permalink / raw)
To: Simon Horman
Cc: Arnd Bergmann, Kevin Hilman, Magnus Damm, linux-renesas-soc, arm,
linux-arm-kernel
On Fri, Jun 21, 2019 at 11:12:04AM +0200, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v5.3.
>
>
> The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
>
> Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm-soc-for-v5.3
>
> for you to fetch changes up to 02af9f90941b6cce5fb672ee058c142adcc11a2f:
>
> soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M (2019-06-06 10:37:06 +0200)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Updates for v5.3
>
> * Auto-enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
> * Don't init CNTVOFF/counter if PSCI is available
>
> ----------------------------------------------------------------
> Geert Uytterhoeven (1):
> soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
>
> Oleksandr Tyshchenko (1):
> ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
Merged, thanks.
Note that in this patch, code like this:
+#ifdef CONFIG_ARM_PSCI_FW
+ if (psci_ops.cpu_on)
+ need_update = false;
+#endif
+
+ if (need_update == false)
+ goto skip_update;
Can either be replaced with a goto under the ifdef, or at the very least, no
need to do a 'need_update == false' -- 'if (need_update)' is sufficient.
-Olof
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [GIT PULL] Renesas ARM Based SoC Updates for v5.3
2019-06-25 12:49 ` [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Olof Johansson
@ 2019-06-25 13:23 ` Geert Uytterhoeven
2019-06-27 1:35 ` Olof Johansson
0 siblings, 1 reply; 6+ messages in thread
From: Geert Uytterhoeven @ 2019-06-25 13:23 UTC (permalink / raw)
To: Olof Johansson
Cc: Arnd Bergmann, Kevin Hilman, Magnus Damm, Linux-Renesas, arm-soc,
Simon Horman, Linux ARM
Hi Olof,
On Tue, Jun 25, 2019 at 3:10 PM Olof Johansson <olof@lixom.net> wrote:
> On Fri, Jun 21, 2019 at 11:12:04AM +0200, Simon Horman wrote:
> > Oleksandr Tyshchenko (1):
> > ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
>
> Merged, thanks.
Thanks!
> Note that in this patch, code like this:
>
> +#ifdef CONFIG_ARM_PSCI_FW
> + if (psci_ops.cpu_on)
> + need_update = false;
> +#endif
> +
> + if (need_update == false)
> + goto skip_update;
>
>
> Can either be replaced with a goto under the ifdef, or at the very least, no
I believe a goto under the ifdef may cause a "label defined but not used"
warning if CONFIG_ARM_PSCI_FW is not defined.
> need to do a 'need_update == false' -- 'if (need_update)' is sufficient.
Yeah, "if (!need_update)" would work too.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [GIT PULL] Renesas ARM Based SoC Updates for v5.3
2019-06-25 13:23 ` Geert Uytterhoeven
@ 2019-06-27 1:35 ` Olof Johansson
0 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2019-06-27 1:35 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Arnd Bergmann, Kevin Hilman, Magnus Damm, Linux-Renesas, arm-soc,
Simon Horman, Linux ARM
On Tue, Jun 25, 2019 at 9:23 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Olof,
>
> On Tue, Jun 25, 2019 at 3:10 PM Olof Johansson <olof@lixom.net> wrote:
> > On Fri, Jun 21, 2019 at 11:12:04AM +0200, Simon Horman wrote:
> > > Oleksandr Tyshchenko (1):
> > > ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
> >
> > Merged, thanks.
>
> Thanks!
>
> > Note that in this patch, code like this:
> >
> > +#ifdef CONFIG_ARM_PSCI_FW
> > + if (psci_ops.cpu_on)
> > + need_update = false;
> > +#endif
> > +
> > + if (need_update == false)
> > + goto skip_update;
> >
> >
> > Can either be replaced with a goto under the ifdef, or at the very least, no
>
> I believe a goto under the ifdef may cause a "label defined but not used"
> warning if CONFIG_ARM_PSCI_FW is not defined.
Ah yeah, good point.
-Olof
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2019-06-21 9:12 [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Simon Horman
2019-06-21 9:12 ` [PATCH 1/2] ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available Simon Horman
2019-06-21 9:12 ` [PATCH 2/2] soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M Simon Horman
2019-06-25 12:49 ` [GIT PULL] Renesas ARM Based SoC Updates for v5.3 Olof Johansson
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