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From: Chen Wang <unicorn_wang@outlook.com>
To: Conor Dooley <conor@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Chen Wang <unicornxw@gmail.com>,
	aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com,
	richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com,
	guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com,
	samuel.holland@sifive.com,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v7 2/4] dt-bindings: clock: sophgo: support SG2042
Date: Fri, 12 Jan 2024 08:08:15 +0800	[thread overview]
Message-ID: <MA0P287MB28229BCC9EA83507B99A9F3BFE6F2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <20240111-jolly-prize-930931cc648a@spud>


On 2024/1/12 0:58, Conor Dooley wrote:
> On Thu, Jan 11, 2024 at 04:00:04PM +0800, Chen Wang wrote:
>> hi,Conor,
>>
>> There are four types of clocks for SG2042 and following are where their
>> control registers are defined in:
>>
>> PLL:all in SYS_CTRL
>> DIV: all in CLOCK
>> GATE: some are in SYS_CTRL, some others are in CLOCK
> When you say "some", do you meant some entire clocks are in SYS_CTRL and
> some entire clocks are in the CLOCKS? Or do you meant that for a given
> clock, some registers are in SYS_CTRL and some are in CLOCK? It's the
> first option, right?

It's the first option.

>> MUX: all in CLOCK

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  reply	other threads:[~2024-01-12  0:09 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-08  6:47 [PATCH v7 0/4] riscv: sophgo: add clock support for sg2042 Chen Wang
2024-01-08  6:48 ` [PATCH v7 1/4] dt-bindings: soc: sophgo: Add Sophgo system control module Chen Wang
2024-01-08  7:03   ` Krzysztof Kozlowski
2024-01-08  7:20     ` Chen Wang
2024-01-08 19:36       ` Krzysztof Kozlowski
2024-01-09  8:26         ` Chen Wang
2024-01-09  8:52         ` Chen Wang
2024-01-09  8:56           ` Krzysztof Kozlowski
2024-01-10  0:44             ` Chen Wang
2024-01-10  7:24               ` Krzysztof Kozlowski
2024-01-08  6:49 ` [PATCH v7 2/4] dt-bindings: clock: sophgo: support SG2042 Chen Wang
2024-01-08  7:04   ` Krzysztof Kozlowski
2024-01-10  0:53     ` Chen Wang
2024-01-10 14:42       ` Conor Dooley
2024-01-11  7:51         ` Chen Wang
2024-01-11  8:00         ` Chen Wang
2024-01-11 16:58           ` Conor Dooley
2024-01-12  0:08             ` Chen Wang [this message]
2024-01-12  7:42               ` Conor Dooley
2024-01-12  8:27                 ` Chen Wang
2024-01-12  8:35                 ` Chen Wang
2024-01-12  8:38                   ` Krzysztof Kozlowski
2024-01-12 19:35             ` Samuel Holland
2024-01-13  1:15               ` Chen Wang
2024-01-08  6:49 ` [PATCH v7 3/4] clk: sophgo: Add SG2042 clock generator driver Chen Wang
2024-01-08  6:49 ` [PATCH v7 4/4] riscv: dts: add clock generator for Sophgo SG2042 SoC Chen Wang
2024-01-10 14:13   ` Conor Dooley
2024-01-11  7:55     ` Chen Wang

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