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From: William Qiu <william.qiu@starfivetech.com>
To: Mark Brown <broonie@kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	Ziv Xu <ziv.xu@starfivetech.com>
Subject: Re: [PATCH v1 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
Date: Mon, 29 May 2023 14:44:13 +0800	[thread overview]
Message-ID: <a09cc0c9-ef4e-120f-e61a-94f628d67e38@starfivetech.com> (raw)
In-Reply-To: <87e9ed95-ea57-44c8-85f8-34264b5c6dde@sirena.org.uk>



On 2023/5/26 23:33, Mark Brown wrote:
> On Fri, May 26, 2023 at 02:25:27PM +0800, William Qiu wrote:
> 
>>      then:
>>        properties:
>> +        clocks:
>> +          maxItems: 3
>> +
>> +        clock-names:
>> +          items:
>> +            - const: qspi-ref
>> +            - const: qspi-ahb
>> +            - const: qspi-apb
>> +
> 
> Are these really the names that the clocks have in the IP?  It seems
> weird that they'd include the IP name in there and not just be ref, ahb
> and apb.
Hi Mark,

	These three clocks are the internal clocks in the IP. The AHB
clock is the main system clock used to transfer data over the AHB bus
between an external master and the QSPI controller. The APB clock is used
to access the register map of the QSPI controller, perform controller and
device configuration.service interrupts and control certain run time modes.
The reference clock is used to serialize the data and drive the external
SPI interface.

	I'm going to change the names of these three clocks to hclk, pclk,
and ref_clk, as defined in the data book. What do you think?

	Thanks for taking time to review this patch series and give useful
suggestions.

Best regards,
William

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  reply	other threads:[~2023-05-29  6:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-26  6:25 [PATCH v1 0/3] Add initialization of clock for StarFive JH7110 SoC William Qiu
2023-05-26  6:25 ` [PATCH v1 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-05-26 15:33   ` Mark Brown
2023-05-29  6:44     ` William Qiu [this message]
2023-05-30 10:02       ` Mark Brown
2023-05-31  2:24         ` William Qiu
2023-05-26  6:25 ` [PATCH v1 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-05-26 15:36   ` Mark Brown
2023-05-29  6:44     ` William Qiu
2023-05-30  2:05       ` William Qiu
2023-05-30 10:33         ` Mark Brown
2023-05-31  6:19           ` William Qiu
2023-05-31 13:20             ` Mark Brown
2023-06-01  1:52               ` William Qiu
2023-05-26  6:25 ` [PATCH v1 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu

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