Re: [PATCH v2 7/8] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board

From: Andrew Lunn <andrew@lunn.ch>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: huziji@marvell.com, ulf.hansson@linaro.org, robh+dt@kernel.org,
	davem@davemloft.net, kuba@kernel.org, linus.walleij@linaro.org,
	catalin.marinas@arm.com, will@kernel.org,
	gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
	adrian.hunter@intel.com, thomas.petazzoni@bootlin.com,
	kostap@marvell.com, robert.marko@sartura.hr,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 7/8] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
Date: Tue, 15 Mar 2022 01:24:41 +0100	[thread overview]
Message-ID: <Yi/cyUJ6oIs96UW2@lunn.ch> (raw)
In-Reply-To: <20220314213143.2404162-8-chris.packham@alliedtelesis.co.nz>

> diff --git a/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
> new file mode 100644
> index 000000000000..ebe464b9ebd2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
> @@ -0,0 +1,343 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Device Tree For AC5.
> + *
> + * Copyright (C) 2021 Marvell
> + *
> + */
> +
> +/dts-v1/;

> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x2 0x00000000 0x0 0x40000000>;
> +		// linux,usable-memory = <0x2 0x00000000 0x0 0x80000000>;
> +	};

Is the memory part of the SoC, or is it on the board? Normally it is
on the board, so should be in the .dts file. But Apple M1 etc...

> +&mdio {
> +	phy0: ethernet-phy@0 {
> +		reg = <0 0>;

phy reg values are a single number, the address on the bus, in the
range 0 to 31.

      Andrew