From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: Olaf Hering <olaf@aepfle.de>,
Stefano Stabellini <sstabellini@kernel.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Julien Grall <jgrall@amazon.com>,
qemu-devel@nongnu.org, Olaf Hering <OHering@suse.com>,
Roman Bolshakov <r.bolshakov@yadro.com>,
Claudio Fontana <cfontana@suse.de>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: [RFC v11 34/55] target/arm: remove broad "else" statements when checking accels
Date: Tue, 23 Mar 2021 16:46:18 +0100 [thread overview]
Message-ID: <20210323154639.23477-27-cfontana@suse.de> (raw)
In-Reply-To: <20210323151749.21299-1-cfontana@suse.de>
There might be more than just KVM and TCG in the future,
so where appropriate, replace broad "else" statements
with the appropriate if (accel_enabled()) check.
Also invert some checks for !kvm_enabled() or !tcg_enabled()
where it seems appropriate to do so.
Note that to make qtest happy we need to perform gpio
initialization in the qtest_enabled() case as well.
Hopefully we do not break any Xen stuff.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Julien Grall <jgrall@amazon.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Olaf Hering <olaf@aepfle.de>
Cc: Olaf Hering <OHering@suse.com>
---
target/arm/cpu.c | 10 ++++++----
target/arm/cpu64.c | 13 +++++++++----
target/arm/machine.c | 19 ++++++-------------
3 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 3491e615c3..31f1b3df09 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -37,6 +37,7 @@
#endif
#include "sysemu/tcg.h"
+#include "sysemu/qtest.h"
#include "kvm/kvm_arm.h"
#include "disas/capstone.h"
#include "fpu/softfloat.h"
@@ -564,7 +565,8 @@ static void arm_cpu_initfn(Object *obj)
* the same interface as non-KVM CPUs.
*/
qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_set_irq, 4);
- } else {
+ }
+ if (tcg_enabled() || qtest_enabled()) {
qdev_init_gpio_in(DEVICE(cpu), arm_cpu_set_irq, 4);
}
@@ -741,14 +743,14 @@ void arm_cpu_post_init(Object *obj)
? cpu_isar_feature(aa64_fp_simd, cpu)
: cpu_isar_feature(aa32_vfp, cpu)) {
cpu->has_vfp = true;
- if (!kvm_enabled()) {
+ if (tcg_enabled()) {
qdev_property_add_static(DEVICE(obj), &arm_cpu_has_vfp_property);
}
}
if (arm_feature(&cpu->env, ARM_FEATURE_NEON)) {
cpu->has_neon = true;
- if (!kvm_enabled()) {
+ if (tcg_enabled()) {
qdev_property_add_static(DEVICE(obj), &arm_cpu_has_neon_property);
}
}
@@ -849,7 +851,7 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
* We have not registered the cpu properties when KVM
* is in use, so the user will not be able to set them.
*/
- if (!kvm_enabled()) {
+ if (tcg_enabled()) {
arm_cpu_pauth_finalize(cpu, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index b3475a93cc..e0cdcc6465 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -23,6 +23,7 @@
#include "qemu/qemu-print.h"
#include "cpu.h"
#include "qemu/module.h"
+#include "sysemu/tcg.h"
#include "sysemu/kvm.h"
#include "kvm/kvm_arm.h"
#include "qapi/visitor.h"
@@ -296,7 +297,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
*/
bitmap_andnot(tmp, kvm_supported, cpu->sve_vq_init, max_vq);
bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq);
- } else {
+ }
+ if (tcg_enabled()) {
/* Propagate enabled bits down through required powers-of-two. */
for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
if (!test_bit(vq - 1, cpu->sve_vq_init)) {
@@ -333,7 +335,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
"vector length must be enabled.\n");
return;
}
- } else {
+ }
+ if (tcg_enabled()) {
/* Disabling a power-of-two disables all larger lengths. */
if (test_bit(0, cpu->sve_vq_init)) {
error_setg(errp, "cannot disable sve128");
@@ -415,7 +418,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
}
return;
}
- } else {
+ }
+ if (tcg_enabled()) {
/* Ensure all required powers-of-two are enabled. */
for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
if (!test_bit(vq - 1, cpu->sve_vq_map)) {
@@ -609,7 +613,8 @@ static void aarch64_max_initfn(Object *obj)
if (kvm_enabled()) {
kvm_arm_set_cpu_features_from_host(cpu);
- } else {
+ }
+ if (tcg_enabled()) {
uint64_t t;
uint32_t u;
aarch64_a57_initfn(obj);
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 595ab94237..cfc2bb4982 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -638,24 +638,21 @@ static int cpu_pre_save(void *opaque)
if (tcg_enabled()) {
pmu_op_start(&cpu->env);
+ if (!write_cpustate_to_list(cpu, false)) {
+ /* This should never fail. */
+ abort();
+ }
}
-
if (kvm_enabled()) {
if (!write_kvmstate_to_list(cpu)) {
/* This should never fail */
abort();
}
-
/*
* kvm_arm_cpu_pre_save() must be called after
* write_kvmstate_to_list()
*/
kvm_arm_cpu_pre_save(cpu);
- } else {
- if (!write_cpustate_to_list(cpu, false)) {
- /* This should never fail. */
- abort();
- }
}
cpu->cpreg_vmstate_array_len = cpu->cpreg_array_len;
@@ -754,20 +751,16 @@ static int cpu_post_load(void *opaque, int version_id)
*/
write_list_to_cpustate(cpu);
kvm_arm_cpu_post_load(cpu);
- } else {
+ }
+ if (tcg_enabled()) {
if (!write_list_to_cpustate(cpu)) {
return -1;
}
- }
-
- if (tcg_enabled()) {
hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu);
-
pmu_op_finish(&cpu->env);
arm_rebuild_hflags(&cpu->env);
}
-
return 0;
}
--
2.26.2
next prev parent reply other threads:[~2021-03-23 16:12 UTC|newest]
Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 15:16 [RFC v11 00/55] arm cleanup experiment for kvm-only build Claudio Fontana
2021-03-23 15:16 ` [RFC v11 01/55] target/arm: move translate modules to tcg/ Claudio Fontana
2021-03-23 15:16 ` [RFC v11 02/55] target/arm: move helpers " Claudio Fontana
2021-03-23 15:16 ` [RFC v11 03/55] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-03-23 15:16 ` [RFC v11 04/55] target/arm: tcg: add sysemu and user subdirs Claudio Fontana
2021-03-24 18:06 ` Richard Henderson
2021-03-24 18:18 ` Richard Henderson
2021-03-24 18:21 ` Claudio Fontana
2021-03-23 15:16 ` [RFC v11 05/55] target/arm: tcg: split mte_helper user-only and sysemu code Claudio Fontana
2021-03-24 18:15 ` Richard Henderson
2021-03-23 15:17 ` [RFC v11 06/55] target/arm: tcg: move sysemu-only parts of debug_helper Claudio Fontana
2021-03-24 18:19 ` Richard Henderson
2021-03-23 15:17 ` [RFC v11 07/55] target/arm: tcg: split tlb_helper user-only and sysemu-only parts Claudio Fontana
2021-03-24 18:20 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 08/55] target/arm: tcg: split m_helper " Claudio Fontana
2021-03-24 18:21 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 09/55] target/arm: only build psci for TCG Claudio Fontana
2021-03-23 15:45 ` [RFC v11 10/55] target/arm: split off cpu-sysemu.c Claudio Fontana
2021-03-24 18:24 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 11/55] target/arm: move physical address translation to cpu-mmu Claudio Fontana
2021-03-24 18:31 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 12/55] target/arm: cpu-mmu: fix comment style Claudio Fontana
2021-03-24 18:32 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 13/55] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-03-24 18:40 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 14/55] target/arm: cpregs: fix style (mostly just comments) Claudio Fontana
2021-03-24 18:40 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 15/55] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-03-24 18:42 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 16/55] target/arm: only perform TCG cpu and machine inits if TCG enabled Claudio Fontana
2021-03-24 18:44 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 17/55] target/arm: kvm: add stubs for some helpers Claudio Fontana
2021-03-24 18:46 ` Richard Henderson
2021-03-24 18:54 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 18/55] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-03-24 18:47 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 19/55] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-03-24 18:56 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 20/55] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-03-24 20:29 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 21/55] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-03-24 20:31 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 22/55] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-03-24 22:03 ` Richard Henderson
2021-03-25 21:44 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 23/55] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-03-24 22:07 ` Richard Henderson
2021-03-25 14:26 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 24/55] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-03-23 15:46 ` [RFC v11 25/55] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-03-24 22:11 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 26/55] target/arm: split a15 cpu model and 32bit class functions to cpu32.c Claudio Fontana
2021-03-24 22:17 ` Richard Henderson
2021-03-25 14:30 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 27/55] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-03-24 22:24 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 28/55] target/arm: refactor exception and cpu code Claudio Fontana
2021-03-24 22:29 ` Richard Henderson
2021-03-25 11:59 ` Claudio Fontana
2021-03-25 18:43 ` Richard Henderson
2021-03-25 18:50 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 29/55] target/arm: cpu: fix style Claudio Fontana
2021-03-24 22:29 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 30/55] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-03-23 22:50 ` Alex Bennée
2021-03-24 8:29 ` Claudio Fontana
2021-03-24 11:41 ` Alex Bennée
2021-03-24 11:48 ` Alex Bennée
2021-03-24 14:34 ` Claudio Fontana
2021-03-24 16:30 ` Alex Bennée
2021-03-24 22:30 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 31/55] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-03-24 22:30 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 32/55] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-03-24 22:35 ` Richard Henderson
2021-03-25 15:14 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 33/55] target/arm: cleanup cpu includes Claudio Fontana
2021-03-23 15:46 ` Claudio Fontana [this message]
2021-03-24 22:37 ` [RFC v11 34/55] target/arm: remove broad "else" statements when checking accels Richard Henderson
2021-03-23 15:46 ` [RFC v11 35/55] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-03-23 15:46 ` [RFC v11 36/55] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-03-23 15:46 ` [RFC v11 37/55] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-03-23 15:46 ` [RFC v11 38/55] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-03-23 15:46 ` [RFC v11 39/55] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-03-23 15:46 ` [RFC v11 40/55] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-03-23 15:46 ` [RFC v11 41/55] target/arm: create kvm cpu accel class Claudio Fontana
2021-03-23 15:46 ` [RFC v11 42/55] target/arm: move kvm post init initialization to kvm cpu accel Claudio Fontana
2021-03-23 15:46 ` [RFC v11 43/55] target/arm: add tcg cpu accel class Claudio Fontana
2021-03-23 15:46 ` [RFC v11 44/55] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-03-23 15:46 ` [RFC v11 45/55] target/arm: cpu-sve: new module Claudio Fontana
2021-03-25 18:40 ` Richard Henderson
2021-03-25 18:48 ` Claudio Fontana
2021-03-26 13:35 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 46/55] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
2021-03-25 18:44 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 47/55] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64 Claudio Fontana
2021-03-25 19:03 ` Richard Henderson
2021-03-25 21:56 ` Claudio Fontana
2021-03-26 19:05 ` Claudio Fontana
2021-03-26 19:13 ` Claudio Fontana
2021-03-27 12:59 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 48/55] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 Claudio Fontana
2021-03-25 19:05 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 49/55] target/arm: cpu-exceptions: new module Claudio Fontana
2021-03-23 15:46 ` [RFC v11 50/55] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64 Claudio Fontana
2021-03-23 15:46 ` [RFC v11 51/55] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication Claudio Fontana
2021-03-23 15:46 ` [RFC v11 52/55] target/arm: refactor arm_cpu_finalize_features into cpu64 Claudio Fontana
2021-03-23 15:46 ` [RFC v11 53/55] XXX target/arm: experiment refactoring cpu "max" Claudio Fontana
2021-03-23 15:46 ` [RFC v11 54/55] target/arm: tcg: remove superfluous CONFIG_TCG check Claudio Fontana
2021-03-23 15:46 ` [RFC v11 55/55] target/arm: remove v7m stub function for !CONFIG_TCG Claudio Fontana
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