From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Roman Bolshakov <r.bolshakov@yadro.com>,
Claudio Fontana <cfontana@suse.de>,
Eduardo Habkost <ehabkost@redhat.com>,
qemu-devel@nongnu.org
Subject: [RFC v11 52/55] target/arm: refactor arm_cpu_finalize_features into cpu64
Date: Tue, 23 Mar 2021 16:46:36 +0100 [thread overview]
Message-ID: <20210323154639.23477-45-cfontana@suse.de> (raw)
In-Reply-To: <20210323151749.21299-1-cfontana@suse.de>
all the features in arm_cpu_finalize_features are actually
TARGET_AARCH64-only, since KVM is now only supported on 64bit.
Therefore move the function to cpu64, and rename it to
aarch64_cpu_finalize_features.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/cpu.h | 3 +-
target/arm/kvm/kvm_arm.h | 5 ++--
target/arm/cpu.c | 65 ++++++++++------------------------------
target/arm/cpu64.c | 25 ++++++++++++++++
target/arm/kvm/kvm64.c | 7 +++--
target/arm/monitor.c | 8 +++--
6 files changed, 54 insertions(+), 59 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e9cfb99ad9..99c03fd6b4 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1036,6 +1036,7 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
#ifdef TARGET_AARCH64
int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+bool aarch64_cpu_finalize_features(ARMCPU *cpu, Error **errp);
static inline bool is_a64(CPUARMState *env)
{
@@ -2096,8 +2097,6 @@ static inline int arm_feature(CPUARMState *env, int feature)
return (env->features & (1ULL << feature)) != 0;
}
-void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp);
-
#if !defined(CONFIG_USER_ONLY)
/* Return true if exception levels below EL3 are in secure state,
* or would be following an exception return to that level.
diff --git a/target/arm/kvm/kvm_arm.h b/target/arm/kvm/kvm_arm.h
index 34f8daa377..5c0d58f527 100644
--- a/target/arm/kvm/kvm_arm.h
+++ b/target/arm/kvm/kvm_arm.h
@@ -275,7 +275,7 @@ void kvm_arm_add_vcpu_properties(Object *obj);
* Validate the kvm-steal-time property selection and set its default
* based on KVM support and guest configuration.
*/
-void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp);
+bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp);
/**
* kvm_arm_steal_time_supported:
@@ -436,9 +436,10 @@ static inline void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa)
g_assert_not_reached();
}
-static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
+static inline bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
{
g_assert_not_reached();
+ return false;
}
static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 82c55b4820..46afe3f134 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -23,7 +23,6 @@
#include "target/arm/idau.h"
#include "qapi/error.h"
#include "cpu.h"
-#include "cpu-sve.h"
#include "cpregs.h"
#ifdef CONFIG_TCG
@@ -815,40 +814,6 @@ static void arm_cpu_finalizefn(Object *obj)
#endif
}
-void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
-{
- Error *local_err = NULL;
-
-#ifdef TARGET_AARCH64
- if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
- if (!cpu_sve_finalize_features(cpu, &local_err)) {
- error_propagate(errp, local_err);
- return;
- }
-
- /*
- * KVM does not support modifications to this feature.
- * We have not registered the cpu properties when KVM
- * is in use, so the user will not be able to set them.
- */
- if (tcg_enabled()) {
- if (!cpu_pauth_finalize(cpu, &local_err)) {
- error_propagate(errp, local_err);
- return;
- }
- }
- }
-#endif /* TARGET_AARCH64 */
-
- if (kvm_enabled()) {
- kvm_arm_steal_time_finalize(cpu, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
- }
-}
-
static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -871,22 +836,22 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
- arm_cpu_finalize_features(cpu, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
-
- if (arm_feature(env, ARM_FEATURE_AARCH64) &&
- cpu->has_vfp != cpu->has_neon) {
- /*
- * This is an architectural requirement for AArch64; AArch32 is
- * more flexible and permits VFP-no-Neon and Neon-no-VFP.
- */
- error_setg(errp,
- "AArch64 CPUs must have both VFP and Neon or neither");
- return;
+#ifdef TARGET_AARCH64
+ if (arm_feature(env, ARM_FEATURE_AARCH64)) {
+ if (!aarch64_cpu_finalize_features(cpu, errp)) {
+ return;
+ }
+ if (cpu->has_vfp != cpu->has_neon) {
+ /*
+ * This is an architectural requirement for AArch64; AArch32 is
+ * more flexible and permits VFP-no-Neon and Neon-no-VFP.
+ */
+ error_setg(errp,
+ "AArch64 CPUs must have both VFP and Neon or neither");
+ return;
+ }
}
+#endif /* TARGET_AARCH64 */
if (!cpu->has_vfp) {
uint64_t t;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 9bc5ddfc09..d67c0b1be4 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -22,6 +22,8 @@
#include "qapi/error.h"
#include "qemu/qemu-print.h"
#include "cpu.h"
+#include "cpu-sve.h"
+#include "tcg/cpu-pauth.h"
#include "cpu-exceptions-aa64.h"
#include "qemu/module.h"
#include "sysemu/tcg.h"
@@ -454,6 +456,29 @@ static gchar *aarch64_gdb_arch_name(CPUState *cs)
return g_strdup("aarch64");
}
+bool aarch64_cpu_finalize_features(ARMCPU *cpu, Error **errp)
+{
+ if (!cpu_sve_finalize_features(cpu, errp)) {
+ return false;
+ }
+ if (tcg_enabled()) {
+ /*
+ * KVM does not support modifications to this feature.
+ * We have not registered the cpu properties when KVM
+ * is in use, so the user will not be able to set them.
+ */
+ if (!cpu_pauth_finalize(cpu, errp)) {
+ return false;
+ }
+ }
+ if (kvm_enabled()) {
+ if (!kvm_arm_steal_time_finalize(cpu, errp)) {
+ return false;
+ }
+ }
+ return true;
+}
+
static void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
ARMCPU *cpu = ARM_CPU(cs);
diff --git a/target/arm/kvm/kvm64.c b/target/arm/kvm/kvm64.c
index b34642e74c..372957331b 100644
--- a/target/arm/kvm/kvm64.c
+++ b/target/arm/kvm/kvm64.c
@@ -677,7 +677,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
return true;
}
-void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
+bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
{
bool has_steal_time = kvm_arm_steal_time_supported();
@@ -691,7 +691,7 @@ void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
if (!has_steal_time) {
error_setg(errp, "'kvm-steal-time' cannot be enabled "
"on this host");
- return;
+ return false;
} else if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
/*
* DEN0057A chapter 2 says "This specification only covers
@@ -702,9 +702,10 @@ void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp)
*/
error_setg(errp, "'kvm-steal-time' cannot be enabled "
"for AArch32 guests");
- return;
+ return false;
}
}
+ return true;
}
bool kvm_arm_aarch32_supported(void)
diff --git a/target/arm/monitor.c b/target/arm/monitor.c
index 0c72bf7c31..8a31c4dd04 100644
--- a/target/arm/monitor.c
+++ b/target/arm/monitor.c
@@ -184,9 +184,11 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
if (!err) {
visit_check_struct(visitor, &err);
}
+#ifdef TARGET_AARCH64
if (!err) {
- arm_cpu_finalize_features(ARM_CPU(obj), &err);
+ aarch64_cpu_finalize_features(ARM_CPU(obj), &err);
}
+#endif /* TARGET_AARCH64 */
visit_end_struct(visitor, NULL);
visit_free(visitor);
if (err) {
@@ -195,7 +197,9 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
return NULL;
}
} else {
- arm_cpu_finalize_features(ARM_CPU(obj), &error_abort);
+#ifdef TARGET_AARCH64
+ aarch64_cpu_finalize_features(ARM_CPU(obj), &error_abort);
+#endif /* TARGET_AARCH64 */
}
expansion_info = g_new0(CpuModelExpansionInfo, 1);
--
2.26.2
next prev parent reply other threads:[~2021-03-23 16:44 UTC|newest]
Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 15:16 [RFC v11 00/55] arm cleanup experiment for kvm-only build Claudio Fontana
2021-03-23 15:16 ` [RFC v11 01/55] target/arm: move translate modules to tcg/ Claudio Fontana
2021-03-23 15:16 ` [RFC v11 02/55] target/arm: move helpers " Claudio Fontana
2021-03-23 15:16 ` [RFC v11 03/55] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-03-23 15:16 ` [RFC v11 04/55] target/arm: tcg: add sysemu and user subdirs Claudio Fontana
2021-03-24 18:06 ` Richard Henderson
2021-03-24 18:18 ` Richard Henderson
2021-03-24 18:21 ` Claudio Fontana
2021-03-23 15:16 ` [RFC v11 05/55] target/arm: tcg: split mte_helper user-only and sysemu code Claudio Fontana
2021-03-24 18:15 ` Richard Henderson
2021-03-23 15:17 ` [RFC v11 06/55] target/arm: tcg: move sysemu-only parts of debug_helper Claudio Fontana
2021-03-24 18:19 ` Richard Henderson
2021-03-23 15:17 ` [RFC v11 07/55] target/arm: tcg: split tlb_helper user-only and sysemu-only parts Claudio Fontana
2021-03-24 18:20 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 08/55] target/arm: tcg: split m_helper " Claudio Fontana
2021-03-24 18:21 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 09/55] target/arm: only build psci for TCG Claudio Fontana
2021-03-23 15:45 ` [RFC v11 10/55] target/arm: split off cpu-sysemu.c Claudio Fontana
2021-03-24 18:24 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 11/55] target/arm: move physical address translation to cpu-mmu Claudio Fontana
2021-03-24 18:31 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 12/55] target/arm: cpu-mmu: fix comment style Claudio Fontana
2021-03-24 18:32 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 13/55] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-03-24 18:40 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 14/55] target/arm: cpregs: fix style (mostly just comments) Claudio Fontana
2021-03-24 18:40 ` Richard Henderson
2021-03-23 15:45 ` [RFC v11 15/55] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-03-24 18:42 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 16/55] target/arm: only perform TCG cpu and machine inits if TCG enabled Claudio Fontana
2021-03-24 18:44 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 17/55] target/arm: kvm: add stubs for some helpers Claudio Fontana
2021-03-24 18:46 ` Richard Henderson
2021-03-24 18:54 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 18/55] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-03-24 18:47 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 19/55] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-03-24 18:56 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 20/55] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-03-24 20:29 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 21/55] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-03-24 20:31 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 22/55] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-03-24 22:03 ` Richard Henderson
2021-03-25 21:44 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 23/55] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-03-24 22:07 ` Richard Henderson
2021-03-25 14:26 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 24/55] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-03-23 15:46 ` [RFC v11 25/55] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-03-24 22:11 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 26/55] target/arm: split a15 cpu model and 32bit class functions to cpu32.c Claudio Fontana
2021-03-24 22:17 ` Richard Henderson
2021-03-25 14:30 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 27/55] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-03-24 22:24 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 28/55] target/arm: refactor exception and cpu code Claudio Fontana
2021-03-24 22:29 ` Richard Henderson
2021-03-25 11:59 ` Claudio Fontana
2021-03-25 18:43 ` Richard Henderson
2021-03-25 18:50 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 29/55] target/arm: cpu: fix style Claudio Fontana
2021-03-24 22:29 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 30/55] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-03-23 22:50 ` Alex Bennée
2021-03-24 8:29 ` Claudio Fontana
2021-03-24 11:41 ` Alex Bennée
2021-03-24 11:48 ` Alex Bennée
2021-03-24 14:34 ` Claudio Fontana
2021-03-24 16:30 ` Alex Bennée
2021-03-24 22:30 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 31/55] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-03-24 22:30 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 32/55] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-03-24 22:35 ` Richard Henderson
2021-03-25 15:14 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 33/55] target/arm: cleanup cpu includes Claudio Fontana
2021-03-23 15:46 ` [RFC v11 34/55] target/arm: remove broad "else" statements when checking accels Claudio Fontana
2021-03-24 22:37 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 35/55] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-03-23 15:46 ` [RFC v11 36/55] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-03-23 15:46 ` [RFC v11 37/55] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-03-23 15:46 ` [RFC v11 38/55] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-03-23 15:46 ` [RFC v11 39/55] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-03-23 15:46 ` [RFC v11 40/55] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-03-23 15:46 ` [RFC v11 41/55] target/arm: create kvm cpu accel class Claudio Fontana
2021-03-23 15:46 ` [RFC v11 42/55] target/arm: move kvm post init initialization to kvm cpu accel Claudio Fontana
2021-03-23 15:46 ` [RFC v11 43/55] target/arm: add tcg cpu accel class Claudio Fontana
2021-03-23 15:46 ` [RFC v11 44/55] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-03-23 15:46 ` [RFC v11 45/55] target/arm: cpu-sve: new module Claudio Fontana
2021-03-25 18:40 ` Richard Henderson
2021-03-25 18:48 ` Claudio Fontana
2021-03-26 13:35 ` Claudio Fontana
2021-03-23 15:46 ` [RFC v11 46/55] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
2021-03-25 18:44 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 47/55] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64 Claudio Fontana
2021-03-25 19:03 ` Richard Henderson
2021-03-25 21:56 ` Claudio Fontana
2021-03-26 19:05 ` Claudio Fontana
2021-03-26 19:13 ` Claudio Fontana
2021-03-27 12:59 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 48/55] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 Claudio Fontana
2021-03-25 19:05 ` Richard Henderson
2021-03-23 15:46 ` [RFC v11 49/55] target/arm: cpu-exceptions: new module Claudio Fontana
2021-03-23 15:46 ` [RFC v11 50/55] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64 Claudio Fontana
2021-03-23 15:46 ` [RFC v11 51/55] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication Claudio Fontana
2021-03-23 15:46 ` Claudio Fontana [this message]
2021-03-23 15:46 ` [RFC v11 53/55] XXX target/arm: experiment refactoring cpu "max" Claudio Fontana
2021-03-23 15:46 ` [RFC v11 54/55] target/arm: tcg: remove superfluous CONFIG_TCG check Claudio Fontana
2021-03-23 15:46 ` [RFC v11 55/55] target/arm: remove v7m stub function for !CONFIG_TCG Claudio Fontana
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210323154639.23477-45-cfontana@suse.de \
--to=cfontana@suse.de \
--cc=alex.bennee@linaro.org \
--cc=ehabkost@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=r.bolshakov@yadro.com \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).