Re: [PATCH v2 07/10] target/riscv/tcg: add MISA user options hash

From: Alistair Francis <alistair23@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  bmeng@tinylab.org,
	liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com,
	 palmer@rivosinc.com
Subject: Re: [PATCH v2 07/10] target/riscv/tcg: add MISA user options hash
Date: Wed, 11 Oct 2023 13:03:15 +1000	[thread overview]
Message-ID: <CAKmqyKMGOzQsQq-NGVw=5wCZKgUO481E7fRVpZQp+sNuag3a0g@mail.gmail.com> (raw)
In-Reply-To: <20231006132134.1135297-8-dbarboza@ventanamicro.com>

On Sat, Oct 7, 2023 at 12:25 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> We already track user choice for multi-letter extensions because we
> needed to honor user choice when enabling/disabling extensions during
> realize(). We refrained from adding the same mechanism for MISA
> extensions since we didn't need it.
>
> Profile support requires tne need to check for user choice for MISA
> extensions, so let's add the corresponding hash now. It works like the
> existing multi-letter hash (multi_ext_user_opts) but tracking MISA bits
> options in the cpu_set_misa_ext_cfg() callback.
>
> Note that we can't re-use the same hash from multi-letter extensions
> because that hash uses cpu->cfg offsets as keys, while for MISA
> extensions we're using MISA bits as keys.
>
> After adding the user hash in cpu_set_misa_ext_cfg(), setting default
> values with object_property_set_bool() in add_misa_properties() will end
> up marking the user choice hash with them. Set the default value
> manually to avoid it.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/tcg/tcg-cpu.c | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 8fb77e9e35..58de4428a9 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -34,6 +34,7 @@
>
>  /* Hash that stores user set extensions */
>  static GHashTable *multi_ext_user_opts;
> +static GHashTable *misa_ext_user_opts;
>
>  static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset)
>  {
> @@ -689,6 +690,10 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name,
>          return;
>      }
>
> +    g_hash_table_insert(misa_ext_user_opts,
> +                        GUINT_TO_POINTER(misa_bit),
> +                        (gpointer)value);
> +
>      prev_val = env->misa_ext & misa_bit;
>
>      if (value == prev_val) {
> @@ -752,6 +757,7 @@ static const RISCVCPUMisaExtConfig misa_ext_cfgs[] = {
>   */
>  static void riscv_cpu_add_misa_properties(Object *cpu_obj)
>  {
> +    CPURISCVState *env = &RISCV_CPU(cpu_obj)->env;
>      bool use_def_vals = riscv_cpu_is_generic(cpu_obj);
>      int i;
>
> @@ -772,7 +778,13 @@ static void riscv_cpu_add_misa_properties(Object *cpu_obj)
>                              NULL, (void *)misa_cfg);
>          object_property_set_description(cpu_obj, name, desc);
>          if (use_def_vals) {
> -            object_property_set_bool(cpu_obj, name, misa_cfg->enabled, NULL);
> +            if (misa_cfg->enabled) {
> +                env->misa_ext |= bit;
> +                env->misa_ext_mask |= bit;
> +            } else {
> +                env->misa_ext &= ~bit;
> +                env->misa_ext_mask &= ~bit;
> +            }
>          }
>      }
>  }
> @@ -967,6 +979,7 @@ static void tcg_cpu_instance_init(CPUState *cs)
>      RISCVCPU *cpu = RISCV_CPU(cs);
>      Object *obj = OBJECT(cpu);
>
> +    misa_ext_user_opts = g_hash_table_new(NULL, g_direct_equal);
>      multi_ext_user_opts = g_hash_table_new(NULL, g_direct_equal);
>      riscv_cpu_add_user_properties(obj);
>
> --
> 2.41.0
>
>