From: Alice Guo <alice.guo@nxp.com>
To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
krzk@kernel.org
Cc: linux-imx@nxp.com, peng.fan@nxp.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 3/4] arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID
Date: Fri, 20 Nov 2020 18:11:11 +0800 [thread overview]
Message-ID: <20201120101112.31819-3-alice.guo@nxp.com> (raw)
In-Reply-To: <20201120101112.31819-1-alice.guo@nxp.com>
In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.
v2: remove the subject prefix "LF-2571-3"
v3: convert register addresses and sizes to hex
v4: delete "stuff" in subject and commit message, add detailed
description
Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++
4 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index d457ce815e68..0e0edd5db07b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -261,6 +261,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mm_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -518,6 +520,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mm_uid: unique_id@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6d3a809a00fd..ff12194b60a1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -245,6 +245,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mn_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -388,6 +390,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mn_uid: unique_id@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index ec6ac523ecfc..8fbcded6a091 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -222,6 +222,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mp_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -328,6 +330,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mp_uid: unique_id@420 {
+ reg = <0x8 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9b6d9307e5d7..6db5cba9c07d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -291,6 +291,8 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>;
+ nvmem-cells = <&imx8mq_uid>;
+ nvmem-cell-names = "soc_unique_id";
bus@30000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
@@ -555,6 +557,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mq_uid: soc_uid@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Alice Guo <alice.guo@nxp.com>
To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
krzk@kernel.org
Cc: devicetree@vger.kernel.org, peng.fan@nxp.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 3/4] arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID
Date: Fri, 20 Nov 2020 18:11:11 +0800 [thread overview]
Message-ID: <20201120101112.31819-3-alice.guo@nxp.com> (raw)
In-Reply-To: <20201120101112.31819-1-alice.guo@nxp.com>
In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.
v2: remove the subject prefix "LF-2571-3"
v3: convert register addresses and sizes to hex
v4: delete "stuff" in subject and commit message, add detailed
description
Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++
4 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index d457ce815e68..0e0edd5db07b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -261,6 +261,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mm_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -518,6 +520,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mm_uid: unique_id@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6d3a809a00fd..ff12194b60a1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -245,6 +245,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mn_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -388,6 +390,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mn_uid: unique_id@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index ec6ac523ecfc..8fbcded6a091 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -222,6 +222,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mp_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -328,6 +330,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mp_uid: unique_id@420 {
+ reg = <0x8 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9b6d9307e5d7..6db5cba9c07d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -291,6 +291,8 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>;
+ nvmem-cells = <&imx8mq_uid>;
+ nvmem-cell-names = "soc_unique_id";
bus@30000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
@@ -555,6 +557,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mq_uid: soc_uid@410 {
+ reg = <0x4 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
--
2.17.1
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next prev parent reply other threads:[~2020-11-20 10:11 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 10:11 [PATCH v4 1/4] dt-bindings: soc: imx8m: add DT Binding doc for soc unique ID Alice Guo
2020-11-20 10:11 ` Alice Guo
2020-11-20 10:11 ` [PATCH v4 2/4] arm64: dts: imx8m: add SoC ID compatible Alice Guo
2020-11-20 10:11 ` Alice Guo
2020-11-20 10:11 ` Alice Guo [this message]
2020-11-20 10:11 ` [PATCH v4 3/4] arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID Alice Guo
2020-11-20 10:53 ` Krzysztof Kozlowski
2020-11-20 10:53 ` Krzysztof Kozlowski
2020-11-20 10:11 ` [PATCH v4 4/4] soc: imx8m: change to use platform driver Alice Guo
2020-11-20 10:11 ` Alice Guo
2020-11-20 10:46 ` Krzysztof Kozlowski
2020-11-20 10:46 ` Krzysztof Kozlowski
2021-03-29 9:08 ` regression due to soc_device_match not handling defer (Was: [PATCH v4 4/4] soc: imx8m: change to use platform driver) Dominique MARTINET
2021-03-29 9:08 ` Dominique MARTINET
2021-03-30 2:41 ` [EXT] " Alice Guo (OSS)
2021-03-30 2:41 ` Alice Guo (OSS)
2021-04-15 1:27 ` Dominique MARTINET
2021-04-15 1:27 ` Dominique MARTINET
2021-04-15 1:33 ` Peng Fan
2021-04-15 1:33 ` Peng Fan
2021-06-24 10:36 ` Lucas Stach
2021-06-24 10:36 ` Lucas Stach
2021-06-29 2:39 ` Peng Fan (OSS)
2021-06-29 2:39 ` Peng Fan (OSS)
2020-11-20 10:50 ` [PATCH v4 1/4] dt-bindings: soc: imx8m: add DT Binding doc for soc unique ID Krzysztof Kozlowski
2020-11-20 10:50 ` Krzysztof Kozlowski
2020-11-23 4:45 ` [EXT] " Alice Guo
2020-11-23 4:45 ` Alice Guo
2020-11-23 9:04 ` Krzysztof Kozlowski
2020-11-23 9:04 ` Krzysztof Kozlowski
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