Re: [PATCH 1/3] ASoC: tlv320aic3x: Mark the RESET register as volatile

From: Jarkko Nikula <jarkko.nikula@bitmer.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>
Cc: alsa-devel@alsa-project.org, jsarha@ti.com
Subject: Re: [PATCH 1/3] ASoC: tlv320aic3x: Mark the RESET register as volatile
Date: Fri, 23 Dec 2016 20:27:09 +0200	[thread overview]
Message-ID: <001a281f-6ae1-37ed-30a0-48cc07fa68ca@bitmer.com> (raw)
In-Reply-To: <20161223092112.7992-2-peter.ujfalusi@ti.com>

Hi

On 12/23/2016 11:21 AM, Peter Ujfalusi wrote:
> The RESET register only have one self clearing bit and it should not be
> cached. If it is cached, when we sync the registers back to the chip we
> will initiate a software reset as well, which is not desirable.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  sound/soc/codecs/tlv320aic3x.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
> index 216f74084c6a..7b6924e19021 100644
> --- a/sound/soc/codecs/tlv320aic3x.c
> +++ b/sound/soc/codecs/tlv320aic3x.c
> @@ -126,6 +126,16 @@ static const struct reg_default aic3x_reg[] = {
>  	{ 108, 0x00 }, { 109, 0x00 },
>  };
>  
> +static bool aic3x_volatile_reg(struct device *dev, unsigned int reg)
> +{
> +	switch (reg) {
> +	case AIC3X_RESET:
> +		return true;
> +	default:
> +		return false;
> +	}
> +}
> +

You mentioned offline you tracked this into my commit 9fb352b18b11
("ASoC: tlv320aic3x: Do soft reset to codec when going to bias off
state") but was it by bisecting or by debugging? I think I tried to
cover it in a commit before 508b76864c18 ("ASoC: tlv320aic3x: Don't sync
first two registers from register cache").

If you found it by debugging can it be that pop noise came because of
2a6fedec195b ("ASoC: tlv320aic3x: Convert to direct regmap API usage")?

Just thinking if there's a need to have this into stable.

Reviewed-by: Jarkko Nikula <jarkko.nikula@bitmer.com>