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From: Marc Zyngier <maz@kernel.org>
To: Steven Price <steven.price@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Juan Quintela <quintela@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Dave Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 16:05:55 +0000	[thread overview]
Message-ID: <0d0eb6da6a11f76d10e532c157181985@kernel.org> (raw)
In-Reply-To: <b975422f-14fd-13b3-c8ca-e8b1a68c0837@arm.com>

On 2020-12-07 15:45, Steven Price wrote:
> On 07/12/2020 15:27, Peter Maydell wrote:
>> On Mon, 7 Dec 2020 at 14:48, Steven Price <steven.price@arm.com> 
>> wrote:
>>> Sounds like you are making good progress - thanks for the update. 
>>> Have
>>> you thought about how the PROT_MTE mappings might work if QEMU itself
>>> were to use MTE? My worry is that we end up with MTE in a guest
>>> preventing QEMU from using MTE itself (because of the PROT_MTE
>>> mappings). I'm hoping QEMU can wrap its use of guest memory in a
>>> sequence which disables tag checking (something similar will be 
>>> needed
>>> for the "protected VM" use case anyway), but this isn't something 
>>> I've
>>> looked into.
>> 
>> It's not entirely the same as the "protected VM" case. For that
>> the patches currently on list basically special case "this is a
>> debug access (eg from gdbstub/monitor)" which then either gets
>> to go via "decrypt guest RAM for debug" or gets failed depending
>> on whether the VM has a debug-is-ok flag enabled. For an MTE
>> guest the common case will be guests doing standard DMA operations
>> to or from guest memory. The ideal API for that from QEMU's
>> point of view would be "accesses to guest RAM don't do tag
>> checks, even if tag checks are enabled for accesses QEMU does to
>> memory it has allocated itself as a normal userspace program".
> 
> Sorry, I know I simplified it rather by saying it's similar to
> protected VM. Basically as I see it there are three types of memory
> access:
> 
> 1) Debug case - has to go via a special case for decryption or
> ignoring the MTE tag value. Hopefully this can be abstracted in the
> same way.
> 
> 2) Migration - for a protected VM there's likely to be a special
> method to allow the VMM access to the encrypted memory (AFAIK memory
> is usually kept inaccessible to the VMM). For MTE this again has to be
> special cased as we actually want both the data and the tag values.
> 
> 3) Device DMA - for a protected VM it's usual to unencrypt a small
> area of memory (with the permission of the guest) and use that as a
> bounce buffer. This is possible with MTE: have an area the VMM
> purposefully maps with PROT_MTE. The issue is that this has a
> performance overhead and we can do better with MTE because it's
> trivial for the VMM to disable the protection for any memory.
> 
> The part I'm unsure on is how easy it is for QEMU to deal with (3)
> without the overhead of bounce buffers. Ideally there'd already be a
> wrapper for guest memory accesses and that could just be wrapped with
> setting TCO during the access. I suspect the actual situation is more
> complex though, and I'm hoping Haibo's investigations will help us
> understand this.

What I'd really like to see is a description of how shared memory
is, in general, supposed to work with MTE. My gut feeling is that
it doesn't, and that you need to turn MTE off when sharing memory
(either implicitly or explicitly).

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Steven Price <steven.price@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Juan Quintela <quintela@redhat.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Dave Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 16:05:55 +0000	[thread overview]
Message-ID: <0d0eb6da6a11f76d10e532c157181985@kernel.org> (raw)
In-Reply-To: <b975422f-14fd-13b3-c8ca-e8b1a68c0837@arm.com>

On 2020-12-07 15:45, Steven Price wrote:
> On 07/12/2020 15:27, Peter Maydell wrote:
>> On Mon, 7 Dec 2020 at 14:48, Steven Price <steven.price@arm.com> 
>> wrote:
>>> Sounds like you are making good progress - thanks for the update. 
>>> Have
>>> you thought about how the PROT_MTE mappings might work if QEMU itself
>>> were to use MTE? My worry is that we end up with MTE in a guest
>>> preventing QEMU from using MTE itself (because of the PROT_MTE
>>> mappings). I'm hoping QEMU can wrap its use of guest memory in a
>>> sequence which disables tag checking (something similar will be 
>>> needed
>>> for the "protected VM" use case anyway), but this isn't something 
>>> I've
>>> looked into.
>> 
>> It's not entirely the same as the "protected VM" case. For that
>> the patches currently on list basically special case "this is a
>> debug access (eg from gdbstub/monitor)" which then either gets
>> to go via "decrypt guest RAM for debug" or gets failed depending
>> on whether the VM has a debug-is-ok flag enabled. For an MTE
>> guest the common case will be guests doing standard DMA operations
>> to or from guest memory. The ideal API for that from QEMU's
>> point of view would be "accesses to guest RAM don't do tag
>> checks, even if tag checks are enabled for accesses QEMU does to
>> memory it has allocated itself as a normal userspace program".
> 
> Sorry, I know I simplified it rather by saying it's similar to
> protected VM. Basically as I see it there are three types of memory
> access:
> 
> 1) Debug case - has to go via a special case for decryption or
> ignoring the MTE tag value. Hopefully this can be abstracted in the
> same way.
> 
> 2) Migration - for a protected VM there's likely to be a special
> method to allow the VMM access to the encrypted memory (AFAIK memory
> is usually kept inaccessible to the VMM). For MTE this again has to be
> special cased as we actually want both the data and the tag values.
> 
> 3) Device DMA - for a protected VM it's usual to unencrypt a small
> area of memory (with the permission of the guest) and use that as a
> bounce buffer. This is possible with MTE: have an area the VMM
> purposefully maps with PROT_MTE. The issue is that this has a
> performance overhead and we can do better with MTE because it's
> trivial for the VMM to disable the protection for any memory.
> 
> The part I'm unsure on is how easy it is for QEMU to deal with (3)
> without the overhead of bounce buffers. Ideally there'd already be a
> wrapper for guest memory accesses and that could just be wrapped with
> setting TCO during the access. I suspect the actual situation is more
> complex though, and I'm hoping Haibo's investigations will help us
> understand this.

What I'd really like to see is a description of how shared memory
is, in general, supposed to work with MTE. My gut feeling is that
it doesn't, and that you need to turn MTE off when sharing memory
(either implicitly or explicitly).

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Steven Price <steven.price@arm.com>
Cc: Juan Quintela <quintela@redhat.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Dave Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 16:05:55 +0000	[thread overview]
Message-ID: <0d0eb6da6a11f76d10e532c157181985@kernel.org> (raw)
In-Reply-To: <b975422f-14fd-13b3-c8ca-e8b1a68c0837@arm.com>

On 2020-12-07 15:45, Steven Price wrote:
> On 07/12/2020 15:27, Peter Maydell wrote:
>> On Mon, 7 Dec 2020 at 14:48, Steven Price <steven.price@arm.com> 
>> wrote:
>>> Sounds like you are making good progress - thanks for the update. 
>>> Have
>>> you thought about how the PROT_MTE mappings might work if QEMU itself
>>> were to use MTE? My worry is that we end up with MTE in a guest
>>> preventing QEMU from using MTE itself (because of the PROT_MTE
>>> mappings). I'm hoping QEMU can wrap its use of guest memory in a
>>> sequence which disables tag checking (something similar will be 
>>> needed
>>> for the "protected VM" use case anyway), but this isn't something 
>>> I've
>>> looked into.
>> 
>> It's not entirely the same as the "protected VM" case. For that
>> the patches currently on list basically special case "this is a
>> debug access (eg from gdbstub/monitor)" which then either gets
>> to go via "decrypt guest RAM for debug" or gets failed depending
>> on whether the VM has a debug-is-ok flag enabled. For an MTE
>> guest the common case will be guests doing standard DMA operations
>> to or from guest memory. The ideal API for that from QEMU's
>> point of view would be "accesses to guest RAM don't do tag
>> checks, even if tag checks are enabled for accesses QEMU does to
>> memory it has allocated itself as a normal userspace program".
> 
> Sorry, I know I simplified it rather by saying it's similar to
> protected VM. Basically as I see it there are three types of memory
> access:
> 
> 1) Debug case - has to go via a special case for decryption or
> ignoring the MTE tag value. Hopefully this can be abstracted in the
> same way.
> 
> 2) Migration - for a protected VM there's likely to be a special
> method to allow the VMM access to the encrypted memory (AFAIK memory
> is usually kept inaccessible to the VMM). For MTE this again has to be
> special cased as we actually want both the data and the tag values.
> 
> 3) Device DMA - for a protected VM it's usual to unencrypt a small
> area of memory (with the permission of the guest) and use that as a
> bounce buffer. This is possible with MTE: have an area the VMM
> purposefully maps with PROT_MTE. The issue is that this has a
> performance overhead and we can do better with MTE because it's
> trivial for the VMM to disable the protection for any memory.
> 
> The part I'm unsure on is how easy it is for QEMU to deal with (3)
> without the overhead of bounce buffers. Ideally there'd already be a
> wrapper for guest memory accesses and that could just be wrapped with
> setting TCO during the access. I suspect the actual situation is more
> complex though, and I'm hoping Haibo's investigations will help us
> understand this.

What I'd really like to see is a description of how shared memory
is, in general, supposed to work with MTE. My gut feeling is that
it doesn't, and that you need to turn MTE off when sharing memory
(either implicitly or explicitly).

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Steven Price <steven.price@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Juan Quintela <quintela@redhat.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Dave Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 16:05:55 +0000	[thread overview]
Message-ID: <0d0eb6da6a11f76d10e532c157181985@kernel.org> (raw)
In-Reply-To: <b975422f-14fd-13b3-c8ca-e8b1a68c0837@arm.com>

On 2020-12-07 15:45, Steven Price wrote:
> On 07/12/2020 15:27, Peter Maydell wrote:
>> On Mon, 7 Dec 2020 at 14:48, Steven Price <steven.price@arm.com> 
>> wrote:
>>> Sounds like you are making good progress - thanks for the update. 
>>> Have
>>> you thought about how the PROT_MTE mappings might work if QEMU itself
>>> were to use MTE? My worry is that we end up with MTE in a guest
>>> preventing QEMU from using MTE itself (because of the PROT_MTE
>>> mappings). I'm hoping QEMU can wrap its use of guest memory in a
>>> sequence which disables tag checking (something similar will be 
>>> needed
>>> for the "protected VM" use case anyway), but this isn't something 
>>> I've
>>> looked into.
>> 
>> It's not entirely the same as the "protected VM" case. For that
>> the patches currently on list basically special case "this is a
>> debug access (eg from gdbstub/monitor)" which then either gets
>> to go via "decrypt guest RAM for debug" or gets failed depending
>> on whether the VM has a debug-is-ok flag enabled. For an MTE
>> guest the common case will be guests doing standard DMA operations
>> to or from guest memory. The ideal API for that from QEMU's
>> point of view would be "accesses to guest RAM don't do tag
>> checks, even if tag checks are enabled for accesses QEMU does to
>> memory it has allocated itself as a normal userspace program".
> 
> Sorry, I know I simplified it rather by saying it's similar to
> protected VM. Basically as I see it there are three types of memory
> access:
> 
> 1) Debug case - has to go via a special case for decryption or
> ignoring the MTE tag value. Hopefully this can be abstracted in the
> same way.
> 
> 2) Migration - for a protected VM there's likely to be a special
> method to allow the VMM access to the encrypted memory (AFAIK memory
> is usually kept inaccessible to the VMM). For MTE this again has to be
> special cased as we actually want both the data and the tag values.
> 
> 3) Device DMA - for a protected VM it's usual to unencrypt a small
> area of memory (with the permission of the guest) and use that as a
> bounce buffer. This is possible with MTE: have an area the VMM
> purposefully maps with PROT_MTE. The issue is that this has a
> performance overhead and we can do better with MTE because it's
> trivial for the VMM to disable the protection for any memory.
> 
> The part I'm unsure on is how easy it is for QEMU to deal with (3)
> without the overhead of bounce buffers. Ideally there'd already be a
> wrapper for guest memory accesses and that could just be wrapped with
> setting TCO during the access. I suspect the actual situation is more
> complex though, and I'm hoping Haibo's investigations will help us
> understand this.

What I'd really like to see is a description of how shared memory
is, in general, supposed to work with MTE. My gut feeling is that
it doesn't, and that you need to turn MTE off when sharing memory
(either implicitly or explicitly).

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-12-07 16:06 UTC|newest]

Thread overview: 152+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-19 15:38 [PATCH v5 0/2] MTE support for KVM guest Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:39 ` [PATCH v5 1/2] arm64: kvm: Save/restore MTE registers Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39 ` [PATCH v5 2/2] arm64: kvm: Introduce MTE VCPU feature Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:45 ` [PATCH v5 0/2] MTE support for KVM guest Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:57   ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 16:39     ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 18:42   ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 19:11     ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-20  9:50       ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:56         ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:58           ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-12-04  8:25         ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-07 14:48           ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 15:27             ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:45               ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 16:05                 ` Marc Zyngier [this message]
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:34                   ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 19:03                     ` Marc Zyngier
2020-12-07 19:03                       ` Marc Zyngier
2020-12-07 19:03                       ` Marc Zyngier
2020-12-07 19:03                       ` Marc Zyngier
2020-12-08 17:21                       ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 18:21                         ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-09 12:44                           ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 13:25                             ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 15:27                               ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 18:27                                 ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:39                                   ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 20:13                                     ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:20                                       ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-07 16:44                 ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 17:10                   ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:44                     ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-08 10:05                   ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08  9:51             ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08 10:01               ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:10                 ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-16  7:31             ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16 10:22               ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-17  1:47                 ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-11-23 12:16   ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert

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