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From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Steven Price <steven.price@arm.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Juan Quintela <quintela@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Dave Martin <Dave.Martin@arm.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 19:03:13 +0000	[thread overview]
Message-ID: <874kkx5thq.wl-maz@kernel.org> (raw)
In-Reply-To: <20201207163405.GD1526@gaia>

On Mon, 07 Dec 2020 16:34:05 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
> 
> On Mon, Dec 07, 2020 at 04:05:55PM +0000, Marc Zyngier wrote:
> > What I'd really like to see is a description of how shared memory
> > is, in general, supposed to work with MTE. My gut feeling is that
> > it doesn't, and that you need to turn MTE off when sharing memory
> > (either implicitly or explicitly).
> 
> The allocation tag (in-memory tag) is a property assigned to a physical
> address range and it can be safely shared between different processes as
> long as they access it via pointers with the same allocation tag (bits
> 59:56). The kernel enables such tagged shared memory for user processes
> (anonymous, tmpfs, shmem).

I think that's one case where the shared memory scheme breaks, as we
have two kernels in charge of their own tags, and they obviously can't
be synchronised

> What we don't have in the architecture is a memory type which allows
> access to tags but no tag checking. To access the data when the tags
> aren't known, the tag checking would have to be disabled via either a
> prctl() or by setting the PSTATE.TCO bit.

I guess that's point (3) in Steven's taxonomy. It still a bit ugly to
fit in an existing piece of userspace, specially if it wants to use
MTE for its own benefit.

> The kernel accesses the user memory via the linear map using a match-all
> tag 0xf, so no TCO bit toggling. For user, however, we disabled such
> match-all tag and it cannot be enabled at run-time (at least not easily,
> it's cached in the TLB). However, we already have two modes to disable
> tag checking which Qemu could use when migrating data+tags.

I wonder whether we will have to have something kernel side to
dump/reload tags in a way that matches the patterns used by live
migration.

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Juan Quintela <quintela@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Dave Martin <Dave.Martin@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Steven Price <steven.price@arm.com>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 19:03:13 +0000	[thread overview]
Message-ID: <874kkx5thq.wl-maz@kernel.org> (raw)
In-Reply-To: <20201207163405.GD1526@gaia>

On Mon, 07 Dec 2020 16:34:05 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
> 
> On Mon, Dec 07, 2020 at 04:05:55PM +0000, Marc Zyngier wrote:
> > What I'd really like to see is a description of how shared memory
> > is, in general, supposed to work with MTE. My gut feeling is that
> > it doesn't, and that you need to turn MTE off when sharing memory
> > (either implicitly or explicitly).
> 
> The allocation tag (in-memory tag) is a property assigned to a physical
> address range and it can be safely shared between different processes as
> long as they access it via pointers with the same allocation tag (bits
> 59:56). The kernel enables such tagged shared memory for user processes
> (anonymous, tmpfs, shmem).

I think that's one case where the shared memory scheme breaks, as we
have two kernels in charge of their own tags, and they obviously can't
be synchronised

> What we don't have in the architecture is a memory type which allows
> access to tags but no tag checking. To access the data when the tags
> aren't known, the tag checking would have to be disabled via either a
> prctl() or by setting the PSTATE.TCO bit.

I guess that's point (3) in Steven's taxonomy. It still a bit ugly to
fit in an existing piece of userspace, specially if it wants to use
MTE for its own benefit.

> The kernel accesses the user memory via the linear map using a match-all
> tag 0xf, so no TCO bit toggling. For user, however, we disabled such
> match-all tag and it cannot be enabled at run-time (at least not easily,
> it's cached in the TLB). However, we already have two modes to disable
> tag checking which Qemu could use when migrating data+tags.

I wonder whether we will have to have something kernel side to
dump/reload tags in a way that matches the patterns used by live
migration.

	M.

-- 
Without deviation from the norm, progress is not possible.


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Juan Quintela <quintela@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Dave Martin <Dave.Martin@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Steven Price <steven.price@arm.com>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 19:03:13 +0000	[thread overview]
Message-ID: <874kkx5thq.wl-maz@kernel.org> (raw)
In-Reply-To: <20201207163405.GD1526@gaia>

On Mon, 07 Dec 2020 16:34:05 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
> 
> On Mon, Dec 07, 2020 at 04:05:55PM +0000, Marc Zyngier wrote:
> > What I'd really like to see is a description of how shared memory
> > is, in general, supposed to work with MTE. My gut feeling is that
> > it doesn't, and that you need to turn MTE off when sharing memory
> > (either implicitly or explicitly).
> 
> The allocation tag (in-memory tag) is a property assigned to a physical
> address range and it can be safely shared between different processes as
> long as they access it via pointers with the same allocation tag (bits
> 59:56). The kernel enables such tagged shared memory for user processes
> (anonymous, tmpfs, shmem).

I think that's one case where the shared memory scheme breaks, as we
have two kernels in charge of their own tags, and they obviously can't
be synchronised

> What we don't have in the architecture is a memory type which allows
> access to tags but no tag checking. To access the data when the tags
> aren't known, the tag checking would have to be disabled via either a
> prctl() or by setting the PSTATE.TCO bit.

I guess that's point (3) in Steven's taxonomy. It still a bit ugly to
fit in an existing piece of userspace, specially if it wants to use
MTE for its own benefit.

> The kernel accesses the user memory via the linear map using a match-all
> tag 0xf, so no TCO bit toggling. For user, however, we disabled such
> match-all tag and it cannot be enabled at run-time (at least not easily,
> it's cached in the TLB). However, we already have two modes to disable
> tag checking which Qemu could use when migrating data+tags.

I wonder whether we will have to have something kernel side to
dump/reload tags in a way that matches the patterns used by live
migration.

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Juan Quintela <quintela@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Dave Martin <Dave.Martin@arm.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Steven Price <steven.price@arm.com>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	Haibo Xu <haibo.xu@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>
Subject: Re: [PATCH v5 0/2] MTE support for KVM guest
Date: Mon, 07 Dec 2020 19:03:13 +0000	[thread overview]
Message-ID: <874kkx5thq.wl-maz@kernel.org> (raw)
In-Reply-To: <20201207163405.GD1526@gaia>

On Mon, 07 Dec 2020 16:34:05 +0000,
Catalin Marinas <catalin.marinas@arm.com> wrote:
> 
> On Mon, Dec 07, 2020 at 04:05:55PM +0000, Marc Zyngier wrote:
> > What I'd really like to see is a description of how shared memory
> > is, in general, supposed to work with MTE. My gut feeling is that
> > it doesn't, and that you need to turn MTE off when sharing memory
> > (either implicitly or explicitly).
> 
> The allocation tag (in-memory tag) is a property assigned to a physical
> address range and it can be safely shared between different processes as
> long as they access it via pointers with the same allocation tag (bits
> 59:56). The kernel enables such tagged shared memory for user processes
> (anonymous, tmpfs, shmem).

I think that's one case where the shared memory scheme breaks, as we
have two kernels in charge of their own tags, and they obviously can't
be synchronised

> What we don't have in the architecture is a memory type which allows
> access to tags but no tag checking. To access the data when the tags
> aren't known, the tag checking would have to be disabled via either a
> prctl() or by setting the PSTATE.TCO bit.

I guess that's point (3) in Steven's taxonomy. It still a bit ugly to
fit in an existing piece of userspace, specially if it wants to use
MTE for its own benefit.

> The kernel accesses the user memory via the linear map using a match-all
> tag 0xf, so no TCO bit toggling. For user, however, we disabled such
> match-all tag and it cannot be enabled at run-time (at least not easily,
> it's cached in the TLB). However, we already have two modes to disable
> tag checking which Qemu could use when migrating data+tags.

I wonder whether we will have to have something kernel side to
dump/reload tags in a way that matches the patterns used by live
migration.

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-12-07 19:04 UTC|newest]

Thread overview: 152+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-19 15:38 [PATCH v5 0/2] MTE support for KVM guest Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:38 ` Steven Price
2020-11-19 15:39 ` [PATCH v5 1/2] arm64: kvm: Save/restore MTE registers Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39 ` [PATCH v5 2/2] arm64: kvm: Introduce MTE VCPU feature Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:39   ` Steven Price
2020-11-19 15:45 ` [PATCH v5 0/2] MTE support for KVM guest Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:45   ` Peter Maydell
2020-11-19 15:57   ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 15:57     ` Steven Price
2020-11-19 16:39     ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 16:39       ` Peter Maydell
2020-11-19 18:42   ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 18:42     ` Andrew Jones
2020-11-19 19:11     ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-19 19:11       ` Marc Zyngier
2020-11-20  9:50       ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:50         ` Steven Price
2020-11-20  9:56         ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:56           ` Marc Zyngier
2020-11-20  9:58           ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-11-20  9:58             ` Steven Price
2020-12-04  8:25         ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-04  8:25           ` Haibo Xu
2020-12-07 14:48           ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 14:48             ` Steven Price
2020-12-07 15:27             ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:27               ` Peter Maydell
2020-12-07 15:45               ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 15:45                 ` Steven Price
2020-12-07 16:05                 ` Marc Zyngier
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:05                   ` Marc Zyngier
2020-12-07 16:34                   ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 16:34                     ` Catalin Marinas
2020-12-07 19:03                     ` Marc Zyngier [this message]
2020-12-07 19:03                       ` Marc Zyngier
2020-12-07 19:03                       ` Marc Zyngier
2020-12-07 19:03                       ` Marc Zyngier
2020-12-08 17:21                       ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 17:21                         ` Catalin Marinas
2020-12-08 18:21                         ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-08 18:21                           ` Marc Zyngier
2020-12-09 12:44                           ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 12:44                             ` Catalin Marinas
2020-12-09 13:25                             ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 13:25                               ` Marc Zyngier
2020-12-09 15:27                               ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 15:27                                 ` Catalin Marinas
2020-12-09 18:27                                 ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:27                                   ` Richard Henderson
2020-12-09 18:39                                   ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 18:39                                     ` Catalin Marinas
2020-12-09 20:13                                     ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:13                                       ` Richard Henderson
2020-12-09 20:20                                       ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-09 20:20                                         ` Peter Maydell
2020-12-07 16:44                 ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 16:44                   ` Dr. David Alan Gilbert
2020-12-07 17:10                   ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:10                     ` Peter Maydell
2020-12-07 17:44                     ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-07 17:44                       ` Dr. David Alan Gilbert
2020-12-08 10:05                   ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08 10:05                     ` Haibo Xu
2020-12-08  9:51             ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08  9:51               ` Haibo Xu
2020-12-08 10:01               ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:01                 ` Marc Zyngier
2020-12-08 10:10                 ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-08 10:10                   ` Haibo Xu
2020-12-16  7:31             ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16  7:31               ` Haibo Xu
2020-12-16 10:22               ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-16 10:22                 ` Steven Price
2020-12-17  1:47                 ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-12-17  1:47                   ` Haibo Xu
2020-11-23 12:16   ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert
2020-11-23 12:16     ` Dr. David Alan Gilbert

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