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From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com
Cc: "Naveen Naidu" <naveennaidu479@gmail.com>,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	skhan@linuxfoundation.org, "K. Y. Srinivasan" <kys@microsoft.com>,
	"Haiyang Zhang" <haiyangz@microsoft.com>,
	"Stephen Hemminger" <sthemmin@microsoft.com>,
	"Wei Liu" <wei.liu@kernel.org>,
	"Dexuan Cui" <decui@microsoft.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-hyperv@vger.kernel.org (open list:Hyper-V/Azure CORE AND
	DRIVERS)
Subject: [PATCH v4 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
Date: Thu, 18 Nov 2021 19:33:34 +0530	[thread overview]
Message-ID: <12124f41cab7d8aa944de05f85d9567bfe157704.1637243717.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1637243717.git.naveennaidu479@gmail.com>

Include PCI_ERROR_RESPONSE along with 0xFFFFFFFF in the comment to
specify a hardware error. This makes MMIO read errors easier to find.

Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
 drivers/pci/controller/pci-hyperv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 6733cb14e775..1f961d0b5d6b 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1774,7 +1774,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
 	 * If the memory enable bit is already set, Hyper-V silently ignores
 	 * the below BAR updates, and the related PCI device driver can not
 	 * work, because reading from the device register(s) always returns
-	 * 0xFFFFFFFF.
+	 * 0xFFFFFFFF (PCI_ERROR_RESPONSE).
 	 */
 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
 		_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com
Cc: "Rob Herring" <robh@kernel.org>, "Wei Liu" <wei.liu@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Stephen Hemminger" <sthemmin@microsoft.com>,
	"open list:Hyper-V/Azure CORE AND DRIVERS"
	<linux-hyperv@vger.kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org,
	"Haiyang Zhang" <haiyangz@microsoft.com>,
	"Dexuan Cui" <decui@microsoft.com>,
	linux-kernel@vger.kernel.org,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	linux-kernel-mentees@lists.linuxfoundation.org
Subject: [PATCH v4 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
Date: Thu, 18 Nov 2021 19:33:34 +0530	[thread overview]
Message-ID: <12124f41cab7d8aa944de05f85d9567bfe157704.1637243717.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1637243717.git.naveennaidu479@gmail.com>

Include PCI_ERROR_RESPONSE along with 0xFFFFFFFF in the comment to
specify a hardware error. This makes MMIO read errors easier to find.

Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
 drivers/pci/controller/pci-hyperv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 6733cb14e775..1f961d0b5d6b 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1774,7 +1774,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
 	 * If the memory enable bit is already set, Hyper-V silently ignores
 	 * the below BAR updates, and the related PCI device driver can not
 	 * work, because reading from the device register(s) always returns
-	 * 0xFFFFFFFF.
+	 * 0xFFFFFFFF (PCI_ERROR_RESPONSE).
 	 */
 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
 		_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
-- 
2.25.1

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  parent reply	other threads:[~2021-11-18 14:09 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-18 14:03 [PATCH v4 00/25] Unify PCI error response checking Naveen Naidu
2021-11-18 14:03 ` Naveen Naidu
2021-11-18 14:03 ` Naveen Naidu
2021-11-18 14:03 ` Naveen Naidu
2021-11-18 14:03 ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 02/25] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 03/25] PCI: Use PCI_SET_ERROR_RESPONSE() when device not found Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 04/25] PCI: Remove redundant error fabrication when device read fails Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 05/25] PCI: thunder: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 06/25] PCI: iproc: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 07/25] PCI: mediatek: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 08/25] PCI: exynos: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 09/25] PCI: histb: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 10/25] PCI: kirin: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 11/25] PCI: aardvark: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 12/25] PCI: mvebu: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 13/25] PCI: altera: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 14/25] PCI: rcar: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 15/25] PCI: rockchip: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 16/25] PCI/ERR: Use PCI_POSSIBLE_ERROR() to check read from hardware Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 17/25] PCI: vmd: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 18/25] PCI: pciehp: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 19/25] PCI/DPC: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 20/25] PCI/PME: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 21/25] PCI: cpqphp: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 22/25] PCI: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 23/25] PCI: keystone: " Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03 ` Naveen Naidu [this message]
2021-11-18 14:03   ` [PATCH v4 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-11-18 14:03 ` [PATCH v4 25/25] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 14:03   ` Naveen Naidu
2021-11-18 20:44 ` [PATCH v4 00/25] Unify PCI error response checking Bjorn Helgaas
2021-11-18 20:44   ` Bjorn Helgaas
2021-11-18 20:44   ` Bjorn Helgaas
2021-11-18 20:44   ` Bjorn Helgaas
2021-11-18 20:44   ` Bjorn Helgaas

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