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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 12/16] drm/i915: Fix PIPE_CRC_CTL for vlv
Date: Wed, 16 Oct 2013 22:55:57 +0200	[thread overview]
Message-ID: <1381956961-16875-13-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1381956961-16875-1-git-send-email-daniel.vetter@ffwll.ch>

The PIPE_B #define was missing the display mmio offset. Use the
_PIPE_INC macro instead, it's simpler.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ad8fe21..4e0f0b7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1887,14 +1887,13 @@
 #define _PIPE_CRC_RES_RES2_A_G4X	(dev_priv->info->display_mmio_offset + 0x60080)
 
 /* Pipe B CRC regs */
-#define _PIPE_CRC_CTL_B			0x61050
 #define _PIPE_CRC_RES_1_B_IVB		0x61064
 #define _PIPE_CRC_RES_2_B_IVB		0x61068
 #define _PIPE_CRC_RES_3_B_IVB		0x6106c
 #define _PIPE_CRC_RES_4_B_IVB		0x61070
 #define _PIPE_CRC_RES_5_B_IVB		0x61074
 
-#define PIPE_CRC_CTL(pipe)	_PIPE(pipe, _PIPE_CRC_CTL_A, _PIPE_CRC_CTL_B)
+#define PIPE_CRC_CTL(pipe)	_PIPE_INC(pipe, _PIPE_CRC_CTL_A, 0x01000)
 #define PIPE_CRC_RES_1_IVB(pipe)	\
 	_PIPE(pipe, _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB)
 #define PIPE_CRC_RES_2_IVB(pipe)	\
-- 
1.8.4.rc3

  parent reply	other threads:[~2013-10-16 21:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-16 20:55 [PATCH 00/16] CRC support for non-ivb Daniel Vetter
2013-10-16 20:55 ` [PATCH 01/16] drm/i915: extract display_pipe_crc_update Daniel Vetter
2013-10-16 20:55 ` [PATCH 02/16] drm/i915: add CRC #defines for ilk/snb Daniel Vetter
2013-10-16 20:55 ` [PATCH 03/16] drm/i915: wire up CRC interrupt " Daniel Vetter
2013-10-16 20:55 ` [PATCH 04/16] drm/i915: use ->get_vblank_counter for the crc frame counter Daniel Vetter
2013-10-16 20:55 ` [PATCH 05/16] drm/i915: wait one vblank when disabling CRCs Daniel Vetter
2013-10-16 20:55 ` [PATCH 06/16] drm/i915: fix CRC debugfs setup Daniel Vetter
2013-10-16 20:55 ` [PATCH 07/16] drm/i915: crc support for hsw Daniel Vetter
2013-10-17 10:53   ` Damien Lespiau
2013-10-17 13:06     ` Daniel Vetter
2013-10-16 20:55 ` [PATCH 08/16] drm/i915: Adjust CRC capture for pre-gen5/vlv Daniel Vetter
2013-10-16 20:55 ` [PATCH 09/16] drm/i915: CRC source selection #defines for gmch/vlv chips Daniel Vetter
2013-10-16 20:55 ` [PATCH 10/16] drm/i915: Wire up CRC interrupts for pre-gen5/vlv Daniel Vetter
2013-10-16 20:55 ` [PATCH 11/16] drm/i915: Enable CRC interrupts on pre-gen5/vlv Daniel Vetter
2013-10-21 10:49   ` Ville Syrjälä
2013-10-21 15:13     ` Daniel Vetter
2013-10-16 20:55 ` Daniel Vetter [this message]
2013-10-21 10:50   ` [PATCH 12/16] drm/i915: Fix PIPE_CRC_CTL for vlv Ville Syrjälä
2013-10-21 15:15     ` Daniel Vetter
2013-10-16 20:55 ` [PATCH 13/16] drm/i915: Add new CRC sources Daniel Vetter
2013-10-16 20:55 ` [PATCH 14/16] drm/i915: Wire up CRC support for gen3/4 Daniel Vetter
2013-10-16 20:56 ` [PATCH 15/16] drm/i915: Wire up gen2 CRC support Daniel Vetter
2013-10-16 20:56 ` [PATCH 16/16] drm/i915: Wire up CRC for vlv Daniel Vetter
2013-10-18 14:37   ` [PATCH 1/3] drm/i915: Wire up gen2 CRC support Daniel Vetter
2013-10-18 14:37     ` [PATCH 2/3] drm/i915: Wire up CRC for vlv Daniel Vetter
2013-10-18 14:37     ` [PATCH 3/3] drm/i915: bikeshed the pipe CRC irq functions a bit Daniel Vetter
2013-10-21 10:22     ` [PATCH 1/3] drm/i915: Wire up gen2 CRC support Ville Syrjälä
2013-10-21 15:17       ` Daniel Vetter
2013-10-21 15:26         ` [PATCH] " Daniel Vetter
2013-10-21 16:16           ` Ville Syrjälä
2013-10-21 16:35             ` Daniel Vetter
2013-10-21 12:08 ` [PATCH 00/16] CRC support for non-ivb Ville Syrjälä

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