From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 11/16] drm/i915: Enable CRC interrupts on pre-gen5/vlv
Date: Mon, 21 Oct 2013 17:13:46 +0200 [thread overview]
Message-ID: <20131021151346.GG4830@phenom.ffwll.local> (raw)
In-Reply-To: <20131021104924.GT13047@intel.com>
On Mon, Oct 21, 2013 at 01:49:24PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 16, 2013 at 10:55:56PM +0200, Daniel Vetter wrote:
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 21 ++++++++++++++++++++-
> > 1 file changed, 20 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index b31e7ca..5c3baa0 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -2574,7 +2574,8 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
> > {
> > drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> > u32 enable_mask;
> > - u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
> > + u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV |
> > + PIPE_CRC_DONE_ENABLE;
> > unsigned long irqflags;
> >
> > enable_mask = I915_DISPLAY_PORT_INTERRUPT;
> > @@ -2697,6 +2698,7 @@ static void i8xx_irq_preinstall(struct drm_device * dev)
> > static int i8xx_irq_postinstall(struct drm_device *dev)
> > {
> > drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> > + unsigned long irqflags;
> >
> > I915_WRITE16(EMR,
> > ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));
> > @@ -2717,6 +2719,13 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
> > I915_USER_INTERRUPT);
> > POSTING_READ16(IER);
> >
> > + /* Interrupt setup is already guaranteed to be single-threaded, this is
> > + * just to make the assert_spin_locked check happy. */
> > + spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> > + i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
> > + i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
>
> Could use PIPE_A/B instead of raw numbers. Maybe a separate patch
> to fix it all up since we're already using raw numbers in some
> other places in i915_irq.c.
Yeah, this is just for consistency. I'll do a follow-up patch to sprinkle
nice enums over i915_irq.c. There's also 1-2 places that would benefit
from a for_each_pipe loop.
-Daniel
>
> > + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> > +
> > return 0;
> > }
> >
> > @@ -2857,6 +2866,7 @@ static int i915_irq_postinstall(struct drm_device *dev)
> > {
> > drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> > u32 enable_mask;
> > + unsigned long irqflags;
> >
> > I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));
> >
> > @@ -2892,6 +2902,13 @@ static int i915_irq_postinstall(struct drm_device *dev)
> >
> > i915_enable_asle_pipestat(dev);
> >
> > + /* Interrupt setup is already guaranteed to be single-threaded, this is
> > + * just to make the assert_spin_locked check happy. */
> > + spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> > + i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
> > + i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
> > + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> > +
> > return 0;
> > }
> >
> > @@ -3105,6 +3122,8 @@ static int i965_irq_postinstall(struct drm_device *dev)
> > * just to make the assert_spin_locked check happy. */
> > spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> > i915_enable_pipestat(dev_priv, 0, PIPE_GMBUS_EVENT_ENABLE);
> > + i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
> > + i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
> > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> >
> > /*
> > --
> > 1.8.4.rc3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-10-21 15:13 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-16 20:55 [PATCH 00/16] CRC support for non-ivb Daniel Vetter
2013-10-16 20:55 ` [PATCH 01/16] drm/i915: extract display_pipe_crc_update Daniel Vetter
2013-10-16 20:55 ` [PATCH 02/16] drm/i915: add CRC #defines for ilk/snb Daniel Vetter
2013-10-16 20:55 ` [PATCH 03/16] drm/i915: wire up CRC interrupt " Daniel Vetter
2013-10-16 20:55 ` [PATCH 04/16] drm/i915: use ->get_vblank_counter for the crc frame counter Daniel Vetter
2013-10-16 20:55 ` [PATCH 05/16] drm/i915: wait one vblank when disabling CRCs Daniel Vetter
2013-10-16 20:55 ` [PATCH 06/16] drm/i915: fix CRC debugfs setup Daniel Vetter
2013-10-16 20:55 ` [PATCH 07/16] drm/i915: crc support for hsw Daniel Vetter
2013-10-17 10:53 ` Damien Lespiau
2013-10-17 13:06 ` Daniel Vetter
2013-10-16 20:55 ` [PATCH 08/16] drm/i915: Adjust CRC capture for pre-gen5/vlv Daniel Vetter
2013-10-16 20:55 ` [PATCH 09/16] drm/i915: CRC source selection #defines for gmch/vlv chips Daniel Vetter
2013-10-16 20:55 ` [PATCH 10/16] drm/i915: Wire up CRC interrupts for pre-gen5/vlv Daniel Vetter
2013-10-16 20:55 ` [PATCH 11/16] drm/i915: Enable CRC interrupts on pre-gen5/vlv Daniel Vetter
2013-10-21 10:49 ` Ville Syrjälä
2013-10-21 15:13 ` Daniel Vetter [this message]
2013-10-16 20:55 ` [PATCH 12/16] drm/i915: Fix PIPE_CRC_CTL for vlv Daniel Vetter
2013-10-21 10:50 ` Ville Syrjälä
2013-10-21 15:15 ` Daniel Vetter
2013-10-16 20:55 ` [PATCH 13/16] drm/i915: Add new CRC sources Daniel Vetter
2013-10-16 20:55 ` [PATCH 14/16] drm/i915: Wire up CRC support for gen3/4 Daniel Vetter
2013-10-16 20:56 ` [PATCH 15/16] drm/i915: Wire up gen2 CRC support Daniel Vetter
2013-10-16 20:56 ` [PATCH 16/16] drm/i915: Wire up CRC for vlv Daniel Vetter
2013-10-18 14:37 ` [PATCH 1/3] drm/i915: Wire up gen2 CRC support Daniel Vetter
2013-10-18 14:37 ` [PATCH 2/3] drm/i915: Wire up CRC for vlv Daniel Vetter
2013-10-18 14:37 ` [PATCH 3/3] drm/i915: bikeshed the pipe CRC irq functions a bit Daniel Vetter
2013-10-21 10:22 ` [PATCH 1/3] drm/i915: Wire up gen2 CRC support Ville Syrjälä
2013-10-21 15:17 ` Daniel Vetter
2013-10-21 15:26 ` [PATCH] " Daniel Vetter
2013-10-21 16:16 ` Ville Syrjälä
2013-10-21 16:35 ` Daniel Vetter
2013-10-21 12:08 ` [PATCH 00/16] CRC support for non-ivb Ville Syrjälä
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