From: Christoffer Dall <christoffer.dall@linaro.org> To: "Paolo Bonzini" <pbonzini@redhat.com>, "Radim Krčmář" <rkrcmar@redhat.com> Cc: kvm@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>, Andre Przywara <andre.przywara@arm.com>, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Subject: [PULL 10/59] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Date: Tue, 24 May 2016 11:09:04 +0200 [thread overview] Message-ID: <1464080993-10884-11-git-send-email-christoffer.dall@linaro.org> (raw) In-Reply-To: <1464080993-10884-1-git-send-email-christoffer.dall@linaro.org> The number of list registers is a property of the underlying system, not of emulated VGIC CPU interface. As we are about to move this variable to global state in the new vgic for clarity, move it from the legacy implementation as well to make the merge of the new code easier. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/arm_vgic.h | 3 --- virt/kvm/arm/hyp/vgic-v2-sr.c | 12 +++++++----- virt/kvm/arm/vgic-v2.c | 4 +++- virt/kvm/arm/vgic.c | 12 ++---------- 4 files changed, 12 insertions(+), 19 deletions(-) diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 3e17fb4..67a6637 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -304,9 +304,6 @@ struct vgic_cpu { unsigned long *active_shared; unsigned long *pend_act_shared; - /* Number of list registers on this CPU */ - int nr_lr; - /* CPU vif control registers for world switch */ union { struct vgic_v2_cpu_if vgic_v2; diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c index 674bdf8..caac41f 100644 --- a/virt/kvm/arm/hyp/vgic-v2-sr.c +++ b/virt/kvm/arm/hyp/vgic-v2-sr.c @@ -21,11 +21,13 @@ #include <asm/kvm_hyp.h> +extern struct vgic_params vgic_v2_params; + static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; u32 eisr0, eisr1; int i; bool expect_mi; @@ -67,7 +69,7 @@ static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; u32 elrsr0, elrsr1; elrsr0 = readl_relaxed(base + GICH_ELRSR0); @@ -86,7 +88,7 @@ static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; int i; for (i = 0; i < nr_lr; i++) { @@ -141,13 +143,13 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu) struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; struct vgic_dist *vgic = &kvm->arch.vgic; void __iomem *base = kern_hyp_va(vgic->vctrl_base); - int i, nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; + int i; u64 live_lrs = 0; if (!base) return; - nr_lr = vcpu->arch.vgic_cpu.nr_lr; for (i = 0; i < nr_lr; i++) if (cpu_if->vgic_lr[i] & GICH_LR_STATE) diff --git a/virt/kvm/arm/vgic-v2.c b/virt/kvm/arm/vgic-v2.c index 7e826c9..334cd7a 100644 --- a/virt/kvm/arm/vgic-v2.c +++ b/virt/kvm/arm/vgic-v2.c @@ -171,7 +171,7 @@ static const struct vgic_ops vgic_v2_ops = { .enable = vgic_v2_enable, }; -static struct vgic_params vgic_v2_params; +struct vgic_params __section(.hyp.text) vgic_v2_params; static void vgic_cpu_init_lrs(void *params) { @@ -201,6 +201,8 @@ int vgic_v2_probe(const struct gic_kvm_info *gic_kvm_info, const struct resource *vctrl_res = &gic_kvm_info->vctrl; const struct resource *vcpu_res = &gic_kvm_info->vcpu; + memset(vgic, 0, sizeof(*vgic)); + if (!gic_kvm_info->maint_irq) { kvm_err("error getting vgic maintenance irq\n"); ret = -ENXIO; diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 91d42a8..f76bb64 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -690,12 +690,11 @@ bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio, */ void vgic_unqueue_irqs(struct kvm_vcpu *vcpu) { - struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; u64 elrsr = vgic_get_elrsr(vcpu); unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr); int i; - for_each_clear_bit(i, elrsr_ptr, vgic_cpu->nr_lr) { + for_each_clear_bit(i, elrsr_ptr, vgic->nr_lr) { struct vgic_lr lr = vgic_get_lr(vcpu, i); /* @@ -1106,7 +1105,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int virt_irq) { int i; - for (i = 0; i < vcpu->arch.vgic_cpu.nr_lr; i++) { + for (i = 0; i < vgic->nr_lr; i++) { struct vgic_lr vlr = vgic_get_lr(vcpu, i); if (vlr.irq == virt_irq && vlr.state & LR_STATE_ACTIVE) @@ -1866,13 +1865,6 @@ static int vgic_vcpu_init_maps(struct kvm_vcpu *vcpu, int nr_irqs) return -ENOMEM; } - /* - * Store the number of LRs per vcpu, so we don't have to go - * all the way to the distributor structure to find out. Only - * assembly code should use this one. - */ - vgic_cpu->nr_lr = vgic->nr_lr; - return 0; } -- 2.1.2.330.g565301e.dirty
WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall) To: linux-arm-kernel@lists.infradead.org Subject: [PULL 10/59] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Date: Tue, 24 May 2016 11:09:04 +0200 [thread overview] Message-ID: <1464080993-10884-11-git-send-email-christoffer.dall@linaro.org> (raw) In-Reply-To: <1464080993-10884-1-git-send-email-christoffer.dall@linaro.org> The number of list registers is a property of the underlying system, not of emulated VGIC CPU interface. As we are about to move this variable to global state in the new vgic for clarity, move it from the legacy implementation as well to make the merge of the new code easier. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> --- include/kvm/arm_vgic.h | 3 --- virt/kvm/arm/hyp/vgic-v2-sr.c | 12 +++++++----- virt/kvm/arm/vgic-v2.c | 4 +++- virt/kvm/arm/vgic.c | 12 ++---------- 4 files changed, 12 insertions(+), 19 deletions(-) diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 3e17fb4..67a6637 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -304,9 +304,6 @@ struct vgic_cpu { unsigned long *active_shared; unsigned long *pend_act_shared; - /* Number of list registers on this CPU */ - int nr_lr; - /* CPU vif control registers for world switch */ union { struct vgic_v2_cpu_if vgic_v2; diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c index 674bdf8..caac41f 100644 --- a/virt/kvm/arm/hyp/vgic-v2-sr.c +++ b/virt/kvm/arm/hyp/vgic-v2-sr.c @@ -21,11 +21,13 @@ #include <asm/kvm_hyp.h> +extern struct vgic_params vgic_v2_params; + static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; u32 eisr0, eisr1; int i; bool expect_mi; @@ -67,7 +69,7 @@ static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; u32 elrsr0, elrsr1; elrsr0 = readl_relaxed(base + GICH_ELRSR0); @@ -86,7 +88,7 @@ static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base) static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - int nr_lr = vcpu->arch.vgic_cpu.nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; int i; for (i = 0; i < nr_lr; i++) { @@ -141,13 +143,13 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu) struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; struct vgic_dist *vgic = &kvm->arch.vgic; void __iomem *base = kern_hyp_va(vgic->vctrl_base); - int i, nr_lr; + int nr_lr = (kern_hyp_va(&vgic_v2_params))->nr_lr; + int i; u64 live_lrs = 0; if (!base) return; - nr_lr = vcpu->arch.vgic_cpu.nr_lr; for (i = 0; i < nr_lr; i++) if (cpu_if->vgic_lr[i] & GICH_LR_STATE) diff --git a/virt/kvm/arm/vgic-v2.c b/virt/kvm/arm/vgic-v2.c index 7e826c9..334cd7a 100644 --- a/virt/kvm/arm/vgic-v2.c +++ b/virt/kvm/arm/vgic-v2.c @@ -171,7 +171,7 @@ static const struct vgic_ops vgic_v2_ops = { .enable = vgic_v2_enable, }; -static struct vgic_params vgic_v2_params; +struct vgic_params __section(.hyp.text) vgic_v2_params; static void vgic_cpu_init_lrs(void *params) { @@ -201,6 +201,8 @@ int vgic_v2_probe(const struct gic_kvm_info *gic_kvm_info, const struct resource *vctrl_res = &gic_kvm_info->vctrl; const struct resource *vcpu_res = &gic_kvm_info->vcpu; + memset(vgic, 0, sizeof(*vgic)); + if (!gic_kvm_info->maint_irq) { kvm_err("error getting vgic maintenance irq\n"); ret = -ENXIO; diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 91d42a8..f76bb64 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -690,12 +690,11 @@ bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio, */ void vgic_unqueue_irqs(struct kvm_vcpu *vcpu) { - struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; u64 elrsr = vgic_get_elrsr(vcpu); unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr); int i; - for_each_clear_bit(i, elrsr_ptr, vgic_cpu->nr_lr) { + for_each_clear_bit(i, elrsr_ptr, vgic->nr_lr) { struct vgic_lr lr = vgic_get_lr(vcpu, i); /* @@ -1106,7 +1105,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int virt_irq) { int i; - for (i = 0; i < vcpu->arch.vgic_cpu.nr_lr; i++) { + for (i = 0; i < vgic->nr_lr; i++) { struct vgic_lr vlr = vgic_get_lr(vcpu, i); if (vlr.irq == virt_irq && vlr.state & LR_STATE_ACTIVE) @@ -1866,13 +1865,6 @@ static int vgic_vcpu_init_maps(struct kvm_vcpu *vcpu, int nr_irqs) return -ENOMEM; } - /* - * Store the number of LRs per vcpu, so we don't have to go - * all the way to the distributor structure to find out. Only - * assembly code should use this one. - */ - vgic_cpu->nr_lr = vgic->nr_lr; - return 0; } -- 2.1.2.330.g565301e.dirty
next prev parent reply other threads:[~2016-05-24 9:09 UTC|newest] Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-24 9:08 [PULL 00/59] KVM/ARM Changes for v4.7 take 2 Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 01/59] kvm: arm64: Fix EC field in inject_abt64 Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 02/59] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 03/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 04/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 05/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 06/59] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 07/59] KVM: arm/arm64: arch_timer: Remove irq_phys_map Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 08/59] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 09/59] KVM: arm/arm64: Move timer IRQ map to latest possible time Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall [this message] 2016-05-24 9:09 ` [PULL 10/59] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Christoffer Dall 2016-05-24 9:09 ` [PULL 11/59] KVM: arm/arm64: Fix MMIO emulation data handling Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 12/59] KVM: arm/arm64: Export mmio_read/write_bus Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 13/59] KVM: arm/arm64: pmu: abstract access to number of SPIs Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 14/59] KVM: arm/arm64: Provide functionality to pause and resume a guest Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 15/59] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 16/59] KVM: arm/arm64: vgic-new: Add data structure definitions Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 17/59] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 18/59] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 19/59] KVM: arm/arm64: vgic-new: Add IRQ sorting Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 20/59] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 21/59] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 22/59] KVM: arm/arm64: vgic-new: Add GICv3 " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 23/59] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 24/59] KVM: arm/arm64: vgic-new: Add MMIO handling framework Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 25/59] KVM: arm/arm64: vgic-new: Add GICv2 " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 26/59] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 27/59] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 28/59] KVM: arm/arm64: vgic-new: Add PENDING " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 29/59] KVM: arm/arm64: vgic-new: Add ACTIVE " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 30/59] KVM: arm/arm64: vgic-new: Add PRIORITY " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 31/59] KVM: arm/arm64: vgic-new: Add CONFIG " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 32/59] KVM: arm/arm64: vgic-new: Add TARGET " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 33/59] KVM: arm/arm64: vgic-new: Add SGIR register handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 34/59] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 35/59] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 36/59] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 37/59] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 38/59] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 39/59] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 40/59] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 41/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 42/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 43/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 44/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 45/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 46/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 47/59] KVM: arm/arm64: vgic-new: Export register access interface Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 48/59] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 49/59] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 50/59] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 51/59] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 52/59] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 53/59] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 54/59] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 55/59] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 56/59] KVM: arm/arm64: vgic-new: Wire up irqfd injection Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 57/59] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 58/59] KVM: arm/arm64: vgic-new: enable build Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 59/59] KVM: arm/arm64: vgic-new: Synchronize changes to active state Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall
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