From: Christoffer Dall <christoffer.dall@linaro.org> To: "Paolo Bonzini" <pbonzini@redhat.com>, "Radim Krčmář" <rkrcmar@redhat.com> Cc: kvm@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>, Andre Przywara <andre.przywara@arm.com>, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Subject: [PULL 24/59] KVM: arm/arm64: vgic-new: Add MMIO handling framework Date: Tue, 24 May 2016 11:09:18 +0200 [thread overview] Message-ID: <1464080993-10884-25-git-send-email-christoffer.dall@linaro.org> (raw) In-Reply-To: <1464080993-10884-1-git-send-email-christoffer.dall@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> Add an MMIO handling framework to the VGIC emulation: Each register is described by its offset, size (or number of bits per IRQ, if applicable) and the read/write handler functions. We provide initialization macros to describe each GIC register later easily. Separate dispatch functions for read and write accesses are connected to the kvm_io_bus framework and binary-search for the responsible register handler based on the offset address within the region. We convert the incoming data (referenced by a pointer) to the host's endianess and use pass-by-value to hand the data over to the actual handler functions. The register handler prototype and the endianess conversion are courtesy of Christoffer Dall. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> --- include/kvm/vgic/vgic.h | 13 +++ virt/kvm/arm/vgic/vgic-mmio.c | 184 ++++++++++++++++++++++++++++++++++++++++++ virt/kvm/arm/vgic/vgic-mmio.h | 99 +++++++++++++++++++++++ 3 files changed, 296 insertions(+) create mode 100644 virt/kvm/arm/vgic/vgic-mmio.c create mode 100644 virt/kvm/arm/vgic/vgic-mmio.h diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index f663288..ff3f9c2 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -106,6 +106,16 @@ struct vgic_irq { enum vgic_irq_config config; /* Level or edge */ }; +struct vgic_register_region; + +struct vgic_io_device { + gpa_t base_addr; + struct kvm_vcpu *redist_vcpu; + const struct vgic_register_region *regions; + int nr_regions; + struct kvm_io_device dev; +}; + struct vgic_dist { bool in_kernel; bool ready; @@ -132,6 +142,9 @@ struct vgic_dist { bool enabled; struct vgic_irq *spis; + + struct vgic_io_device dist_iodev; + struct vgic_io_device *redist_iodevs; }; struct vgic_v2_cpu_if { diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c new file mode 100644 index 0000000..012b82b --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -0,0 +1,184 @@ +/* + * VGIC MMIO handling functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bitops.h> +#include <linux/bsearch.h> +#include <linux/kvm.h> +#include <linux/kvm_host.h> +#include <kvm/iodev.h> +#include <kvm/arm_vgic.h> + +#include "vgic.h" +#include "vgic-mmio.h" + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return 0; +} + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return -1UL; +} + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val) +{ + /* Ignore */ +} + +static int match_region(const void *key, const void *elt) +{ + const unsigned int offset = (unsigned long)key; + const struct vgic_register_region *region = elt; + + if (offset < region->reg_offset) + return -1; + + if (offset >= region->reg_offset + region->len) + return 1; + + return 0; +} + +/* Find the proper register handler entry given a certain address offset. */ +static const struct vgic_register_region * +vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions, + unsigned int offset) +{ + return bsearch((void *)(uintptr_t)offset, region, nr_regions, + sizeof(region[0]), match_region); +} + +/* + * kvm_mmio_read_buf() returns a value in a format where it can be converted + * to a byte array and be directly observed as the guest wanted it to appear + * in memory if it had done the store itself, which is LE for the GIC, as the + * guest knows the GIC is always LE. + * + * We convert this value to the CPUs native format to deal with it as a data + * value. + */ +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len) +{ + unsigned long data = kvm_mmio_read_buf(val, len); + + switch (len) { + case 1: + return data; + case 2: + return le16_to_cpu(data); + case 4: + return le32_to_cpu(data); + default: + return le64_to_cpu(data); + } +} + +/* + * kvm_mmio_write_buf() expects a value in a format such that if converted to + * a byte array it is observed as the guest would see it if it could perform + * the load directly. Since the GIC is LE, and the guest knows this, the + * guest expects a value in little endian format. + * + * We convert the data value from the CPUs native format to LE so that the + * value is returned in the proper format. + */ +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data) +{ + switch (len) { + case 1: + break; + case 2: + data = cpu_to_le16(data); + break; + case 4: + data = cpu_to_le32(data); + break; + default: + data = cpu_to_le64(data); + } + + kvm_mmio_write_buf(buf, len, data); +} + +static +struct vgic_io_device *kvm_to_vgic_iodev(const struct kvm_io_device *dev) +{ + return container_of(dev, struct vgic_io_device, dev); +} + +static bool check_region(const struct vgic_register_region *region, + gpa_t addr, int len) +{ + if ((region->access_flags & VGIC_ACCESS_8bit) && len == 1) + return true; + if ((region->access_flags & VGIC_ACCESS_32bit) && + len == sizeof(u32) && !(addr & 3)) + return true; + if ((region->access_flags & VGIC_ACCESS_64bit) && + len == sizeof(u64) && !(addr & 7)) + return true; + + return false; +} + +static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data; + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region || !check_region(region, addr, len)) { + memset(val, 0, len); + return 0; + } + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + data = region->read(r_vcpu, addr, len); + vgic_data_host_to_mmio_bus(val, len, data); + return 0; +} + +static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, const void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data = vgic_data_mmio_bus_to_host(val, len); + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return 0; + + if (!check_region(region, addr, len)) + return 0; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + region->write(r_vcpu, addr, len, data); + return 0; +} + +struct kvm_io_device_ops kvm_io_gic_ops = { + .read = dispatch_mmio_read, + .write = dispatch_mmio_write, +}; diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h new file mode 100644 index 0000000..3023ecf --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __KVM_ARM_VGIC_MMIO_H__ +#define __KVM_ARM_VGIC_MMIO_H__ + +struct vgic_register_region { + unsigned int reg_offset; + unsigned int len; + unsigned int bits_per_irq; + unsigned int access_flags; + unsigned long (*read)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len); + void (*write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, + unsigned long val); +}; + +extern struct kvm_io_device_ops kvm_io_gic_ops; + +#define VGIC_ACCESS_8bit 1 +#define VGIC_ACCESS_32bit 2 +#define VGIC_ACCESS_64bit 4 + +/* + * Generate a mask that covers the number of bytes required to address + * up to 1024 interrupts, each represented by <bits> bits. This assumes + * that <bits> is a power of two. + */ +#define VGIC_ADDR_IRQ_MASK(bits) (((bits) * 1024 / 8) - 1) + +/* + * (addr & mask) gives us the byte offset for the INT ID, so we want to + * divide this with 'bytes per irq' to get the INT ID, which is given + * by '(bits) / 8'. But we do this with fixed-point-arithmetic and + * take advantage of the fact that division by a fraction equals + * multiplication with the inverted fraction, and scale up both the + * numerator and denominator with 8 to support at most 64 bits per IRQ: + */ +#define VGIC_ADDR_TO_INTID(addr, bits) (((addr) & VGIC_ADDR_IRQ_MASK(bits)) * \ + 64 / (bits) / 8) + +/* + * Some VGIC registers store per-IRQ information, with a different number + * of bits per IRQ. For those registers this macro is used. + * The _WITH_LENGTH version instantiates registers with a fixed length + * and is mutually exclusive with the _PER_IRQ version. + */ +#define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, bpi, acc) \ + { \ + .reg_offset = off, \ + .bits_per_irq = bpi, \ + .len = bpi * 1024 / 8, \ + .access_flags = acc, \ + .read = rd, \ + .write = wr, \ + } + +#define REGISTER_DESC_WITH_LENGTH(off, rd, wr, length, acc) \ + { \ + .reg_offset = off, \ + .bits_per_irq = 0, \ + .len = length, \ + .access_flags = acc, \ + .read = rd, \ + .write = wr, \ + } + +int kvm_vgic_register_mmio_region(struct kvm *kvm, struct kvm_vcpu *vcpu, + struct vgic_register_region *reg_desc, + struct vgic_io_device *region, + int nr_irqs, bool offset_private); + +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len); + +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data); + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + +#endif -- 2.1.2.330.g565301e.dirty
WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall) To: linux-arm-kernel@lists.infradead.org Subject: [PULL 24/59] KVM: arm/arm64: vgic-new: Add MMIO handling framework Date: Tue, 24 May 2016 11:09:18 +0200 [thread overview] Message-ID: <1464080993-10884-25-git-send-email-christoffer.dall@linaro.org> (raw) In-Reply-To: <1464080993-10884-1-git-send-email-christoffer.dall@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> Add an MMIO handling framework to the VGIC emulation: Each register is described by its offset, size (or number of bits per IRQ, if applicable) and the read/write handler functions. We provide initialization macros to describe each GIC register later easily. Separate dispatch functions for read and write accesses are connected to the kvm_io_bus framework and binary-search for the responsible register handler based on the offset address within the region. We convert the incoming data (referenced by a pointer) to the host's endianess and use pass-by-value to hand the data over to the actual handler functions. The register handler prototype and the endianess conversion are courtesy of Christoffer Dall. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> --- include/kvm/vgic/vgic.h | 13 +++ virt/kvm/arm/vgic/vgic-mmio.c | 184 ++++++++++++++++++++++++++++++++++++++++++ virt/kvm/arm/vgic/vgic-mmio.h | 99 +++++++++++++++++++++++ 3 files changed, 296 insertions(+) create mode 100644 virt/kvm/arm/vgic/vgic-mmio.c create mode 100644 virt/kvm/arm/vgic/vgic-mmio.h diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index f663288..ff3f9c2 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -106,6 +106,16 @@ struct vgic_irq { enum vgic_irq_config config; /* Level or edge */ }; +struct vgic_register_region; + +struct vgic_io_device { + gpa_t base_addr; + struct kvm_vcpu *redist_vcpu; + const struct vgic_register_region *regions; + int nr_regions; + struct kvm_io_device dev; +}; + struct vgic_dist { bool in_kernel; bool ready; @@ -132,6 +142,9 @@ struct vgic_dist { bool enabled; struct vgic_irq *spis; + + struct vgic_io_device dist_iodev; + struct vgic_io_device *redist_iodevs; }; struct vgic_v2_cpu_if { diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c new file mode 100644 index 0000000..012b82b --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -0,0 +1,184 @@ +/* + * VGIC MMIO handling functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bitops.h> +#include <linux/bsearch.h> +#include <linux/kvm.h> +#include <linux/kvm_host.h> +#include <kvm/iodev.h> +#include <kvm/arm_vgic.h> + +#include "vgic.h" +#include "vgic-mmio.h" + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return 0; +} + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return -1UL; +} + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val) +{ + /* Ignore */ +} + +static int match_region(const void *key, const void *elt) +{ + const unsigned int offset = (unsigned long)key; + const struct vgic_register_region *region = elt; + + if (offset < region->reg_offset) + return -1; + + if (offset >= region->reg_offset + region->len) + return 1; + + return 0; +} + +/* Find the proper register handler entry given a certain address offset. */ +static const struct vgic_register_region * +vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions, + unsigned int offset) +{ + return bsearch((void *)(uintptr_t)offset, region, nr_regions, + sizeof(region[0]), match_region); +} + +/* + * kvm_mmio_read_buf() returns a value in a format where it can be converted + * to a byte array and be directly observed as the guest wanted it to appear + * in memory if it had done the store itself, which is LE for the GIC, as the + * guest knows the GIC is always LE. + * + * We convert this value to the CPUs native format to deal with it as a data + * value. + */ +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len) +{ + unsigned long data = kvm_mmio_read_buf(val, len); + + switch (len) { + case 1: + return data; + case 2: + return le16_to_cpu(data); + case 4: + return le32_to_cpu(data); + default: + return le64_to_cpu(data); + } +} + +/* + * kvm_mmio_write_buf() expects a value in a format such that if converted to + * a byte array it is observed as the guest would see it if it could perform + * the load directly. Since the GIC is LE, and the guest knows this, the + * guest expects a value in little endian format. + * + * We convert the data value from the CPUs native format to LE so that the + * value is returned in the proper format. + */ +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data) +{ + switch (len) { + case 1: + break; + case 2: + data = cpu_to_le16(data); + break; + case 4: + data = cpu_to_le32(data); + break; + default: + data = cpu_to_le64(data); + } + + kvm_mmio_write_buf(buf, len, data); +} + +static +struct vgic_io_device *kvm_to_vgic_iodev(const struct kvm_io_device *dev) +{ + return container_of(dev, struct vgic_io_device, dev); +} + +static bool check_region(const struct vgic_register_region *region, + gpa_t addr, int len) +{ + if ((region->access_flags & VGIC_ACCESS_8bit) && len == 1) + return true; + if ((region->access_flags & VGIC_ACCESS_32bit) && + len == sizeof(u32) && !(addr & 3)) + return true; + if ((region->access_flags & VGIC_ACCESS_64bit) && + len == sizeof(u64) && !(addr & 7)) + return true; + + return false; +} + +static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data; + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region || !check_region(region, addr, len)) { + memset(val, 0, len); + return 0; + } + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + data = region->read(r_vcpu, addr, len); + vgic_data_host_to_mmio_bus(val, len, data); + return 0; +} + +static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, const void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data = vgic_data_mmio_bus_to_host(val, len); + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return 0; + + if (!check_region(region, addr, len)) + return 0; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + region->write(r_vcpu, addr, len, data); + return 0; +} + +struct kvm_io_device_ops kvm_io_gic_ops = { + .read = dispatch_mmio_read, + .write = dispatch_mmio_write, +}; diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h new file mode 100644 index 0000000..3023ecf --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __KVM_ARM_VGIC_MMIO_H__ +#define __KVM_ARM_VGIC_MMIO_H__ + +struct vgic_register_region { + unsigned int reg_offset; + unsigned int len; + unsigned int bits_per_irq; + unsigned int access_flags; + unsigned long (*read)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len); + void (*write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, + unsigned long val); +}; + +extern struct kvm_io_device_ops kvm_io_gic_ops; + +#define VGIC_ACCESS_8bit 1 +#define VGIC_ACCESS_32bit 2 +#define VGIC_ACCESS_64bit 4 + +/* + * Generate a mask that covers the number of bytes required to address + * up to 1024 interrupts, each represented by <bits> bits. This assumes + * that <bits> is a power of two. + */ +#define VGIC_ADDR_IRQ_MASK(bits) (((bits) * 1024 / 8) - 1) + +/* + * (addr & mask) gives us the byte offset for the INT ID, so we want to + * divide this with 'bytes per irq' to get the INT ID, which is given + * by '(bits) / 8'. But we do this with fixed-point-arithmetic and + * take advantage of the fact that division by a fraction equals + * multiplication with the inverted fraction, and scale up both the + * numerator and denominator with 8 to support at most 64 bits per IRQ: + */ +#define VGIC_ADDR_TO_INTID(addr, bits) (((addr) & VGIC_ADDR_IRQ_MASK(bits)) * \ + 64 / (bits) / 8) + +/* + * Some VGIC registers store per-IRQ information, with a different number + * of bits per IRQ. For those registers this macro is used. + * The _WITH_LENGTH version instantiates registers with a fixed length + * and is mutually exclusive with the _PER_IRQ version. + */ +#define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, bpi, acc) \ + { \ + .reg_offset = off, \ + .bits_per_irq = bpi, \ + .len = bpi * 1024 / 8, \ + .access_flags = acc, \ + .read = rd, \ + .write = wr, \ + } + +#define REGISTER_DESC_WITH_LENGTH(off, rd, wr, length, acc) \ + { \ + .reg_offset = off, \ + .bits_per_irq = 0, \ + .len = length, \ + .access_flags = acc, \ + .read = rd, \ + .write = wr, \ + } + +int kvm_vgic_register_mmio_region(struct kvm *kvm, struct kvm_vcpu *vcpu, + struct vgic_register_region *reg_desc, + struct vgic_io_device *region, + int nr_irqs, bool offset_private); + +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len); + +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data); + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + +#endif -- 2.1.2.330.g565301e.dirty
next prev parent reply other threads:[~2016-05-24 9:09 UTC|newest] Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-24 9:08 [PULL 00/59] KVM/ARM Changes for v4.7 take 2 Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 01/59] kvm: arm64: Fix EC field in inject_abt64 Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 02/59] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 03/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 04/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:08 ` [PULL 05/59] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Christoffer Dall 2016-05-24 9:08 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 06/59] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 07/59] KVM: arm/arm64: arch_timer: Remove irq_phys_map Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 08/59] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 09/59] KVM: arm/arm64: Move timer IRQ map to latest possible time Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 10/59] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 11/59] KVM: arm/arm64: Fix MMIO emulation data handling Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 12/59] KVM: arm/arm64: Export mmio_read/write_bus Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 13/59] KVM: arm/arm64: pmu: abstract access to number of SPIs Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 14/59] KVM: arm/arm64: Provide functionality to pause and resume a guest Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 15/59] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 16/59] KVM: arm/arm64: vgic-new: Add data structure definitions Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 17/59] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 18/59] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 19/59] KVM: arm/arm64: vgic-new: Add IRQ sorting Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 20/59] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 21/59] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 22/59] KVM: arm/arm64: vgic-new: Add GICv3 " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 23/59] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall [this message] 2016-05-24 9:09 ` [PULL 24/59] KVM: arm/arm64: vgic-new: Add MMIO handling framework Christoffer Dall 2016-05-24 9:09 ` [PULL 25/59] KVM: arm/arm64: vgic-new: Add GICv2 " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 26/59] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 27/59] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 28/59] KVM: arm/arm64: vgic-new: Add PENDING " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 29/59] KVM: arm/arm64: vgic-new: Add ACTIVE " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 30/59] KVM: arm/arm64: vgic-new: Add PRIORITY " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 31/59] KVM: arm/arm64: vgic-new: Add CONFIG " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 32/59] KVM: arm/arm64: vgic-new: Add TARGET " Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 33/59] KVM: arm/arm64: vgic-new: Add SGIR register handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 34/59] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 35/59] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 36/59] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 37/59] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 38/59] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 39/59] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 40/59] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 41/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 42/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 43/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 44/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 45/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 46/59] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 47/59] KVM: arm/arm64: vgic-new: Export register access interface Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 48/59] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 49/59] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 50/59] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 51/59] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 52/59] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 53/59] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 54/59] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 55/59] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 56/59] KVM: arm/arm64: vgic-new: Wire up irqfd injection Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 57/59] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 58/59] KVM: arm/arm64: vgic-new: enable build Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall 2016-05-24 9:09 ` [PULL 59/59] KVM: arm/arm64: vgic-new: Synchronize changes to active state Christoffer Dall 2016-05-24 9:09 ` Christoffer Dall
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