From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Inochi Amaoto <inochiama@outlook.com>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Chen Wang <unicorn_wang@outlook.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Jisheng Zhang <jszhang@kernel.org>, Liu Gui <kenneth.liu@sophgo.com>, Jingbao Qiu <qiujingbao.dlmu@gmail.com>, dlan@gentoo.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Date: Tue, 26 Mar 2024 12:50:33 +0100 [thread overview] Message-ID: <1525c377-af73-4204-8a2b-983c6d99316c@linaro.org> (raw) In-Reply-To: <IA1PR20MB4953EA589A0FF36DC6FCF0E8BB352@IA1PR20MB4953.namprd20.prod.outlook.com> On 26/03/2024 12:41, Inochi Amaoto wrote: >>> >>> The driver does use this file. >> >> I checked and could not find. Please point me to specific parts of the code. >> > > In cv1800_dmamux_route_allocate. >> + regmap_set_bits(dmamux->regmap, >> + DMAMUX_CH_REG(chid), >> + DMAMUX_CH_SET(chid, devid)); >> + >> + regmap_update_bits(dmamux->regmap, CV1800_SDMA_DMA_INT_MUX, >> + DMAMUX_INT_CH_MASK(chid, cpuid), >> + DMAMUX_INT_CH_BIT(chid, cpuid)); > > I think this is. So where exactly? I don't see any define being used here. CV1800_SDMA_DMA_INT_MUX is not in your header. DMAMUX_ is not in your header. So what are you pointing? I don't understand this communication. Are you mocking me here or what? It's waste of my time. > >>> >>>>> And considering the limitation of this dmamux, maybe only devices that >>>>> require dma as a must can have the dma assigned. >>>>> Due to the fact, I think it may be a long time to wait for this header >>>>> to be used as the binding header. >>>> >>>> I don't understand. You did not provide a single reason why this is a >>>> binding. Reason is: mapping IDs between DTS and driver. Where is this >>>> reason? >>>> >>> >>> It seems like that I misunderstood something. This file provides one-one >>> mapping between the dma device id and cpuid, which is both used in the >>> dts and driver. For dts, it provides device id and cpu id mapping. And >>> for driver, it is used as the directive to tell how to write the mapping >>> register. >> >> So where is it? I looked for DMA_TDM0_RX - nothing. Then DMA_I2C1_RX - >> nothing. Then any "DMA_" - also looks nothing. >> > > It is just the value writed, so I say it is just a one-one mapping. > Maybe I misunderstand the binding meaning? Is the binding a mapping > between the dts and something defind in the driver (not the real > device)? Binding headers contains IDs which are used by the driver and DTS code. Hardware constants are not bindings. Register values, addresses, whatever hardware is using is not a binding. Best regards, Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Inochi Amaoto <inochiama@outlook.com>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Chen Wang <unicorn_wang@outlook.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Jisheng Zhang <jszhang@kernel.org>, Liu Gui <kenneth.liu@sophgo.com>, Jingbao Qiu <qiujingbao.dlmu@gmail.com>, dlan@gentoo.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Date: Tue, 26 Mar 2024 12:50:33 +0100 [thread overview] Message-ID: <1525c377-af73-4204-8a2b-983c6d99316c@linaro.org> (raw) In-Reply-To: <IA1PR20MB4953EA589A0FF36DC6FCF0E8BB352@IA1PR20MB4953.namprd20.prod.outlook.com> On 26/03/2024 12:41, Inochi Amaoto wrote: >>> >>> The driver does use this file. >> >> I checked and could not find. Please point me to specific parts of the code. >> > > In cv1800_dmamux_route_allocate. >> + regmap_set_bits(dmamux->regmap, >> + DMAMUX_CH_REG(chid), >> + DMAMUX_CH_SET(chid, devid)); >> + >> + regmap_update_bits(dmamux->regmap, CV1800_SDMA_DMA_INT_MUX, >> + DMAMUX_INT_CH_MASK(chid, cpuid), >> + DMAMUX_INT_CH_BIT(chid, cpuid)); > > I think this is. So where exactly? I don't see any define being used here. CV1800_SDMA_DMA_INT_MUX is not in your header. DMAMUX_ is not in your header. So what are you pointing? I don't understand this communication. Are you mocking me here or what? It's waste of my time. > >>> >>>>> And considering the limitation of this dmamux, maybe only devices that >>>>> require dma as a must can have the dma assigned. >>>>> Due to the fact, I think it may be a long time to wait for this header >>>>> to be used as the binding header. >>>> >>>> I don't understand. You did not provide a single reason why this is a >>>> binding. Reason is: mapping IDs between DTS and driver. Where is this >>>> reason? >>>> >>> >>> It seems like that I misunderstood something. This file provides one-one >>> mapping between the dma device id and cpuid, which is both used in the >>> dts and driver. For dts, it provides device id and cpu id mapping. And >>> for driver, it is used as the directive to tell how to write the mapping >>> register. >> >> So where is it? I looked for DMA_TDM0_RX - nothing. Then DMA_I2C1_RX - >> nothing. Then any "DMA_" - also looks nothing. >> > > It is just the value writed, so I say it is just a one-one mapping. > Maybe I misunderstand the binding meaning? Is the binding a mapping > between the dts and something defind in the driver (not the real > device)? Binding headers contains IDs which are used by the driver and DTS code. Hardware constants are not bindings. Register values, addresses, whatever hardware is using is not a binding. Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-03-26 11:50 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-26 1:44 [PATCH v5 0/3] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 2024-03-26 1:44 ` Inochi Amaoto 2024-03-26 1:47 ` [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto 2024-03-26 1:47 ` Inochi Amaoto 2024-03-26 3:37 ` Frank Li 2024-03-26 3:37 ` Frank Li 2024-03-26 3:49 ` Inochi Amaoto 2024-03-26 3:49 ` Inochi Amaoto 2024-03-26 6:50 ` Krzysztof Kozlowski 2024-03-26 6:50 ` Krzysztof Kozlowski 2024-03-26 6:51 ` Krzysztof Kozlowski 2024-03-26 6:51 ` Krzysztof Kozlowski 2024-03-26 6:57 ` Krzysztof Kozlowski 2024-03-26 6:57 ` Krzysztof Kozlowski 2024-03-26 7:35 ` Inochi Amaoto 2024-03-26 7:35 ` Inochi Amaoto 2024-03-26 8:53 ` Krzysztof Kozlowski 2024-03-26 8:53 ` Krzysztof Kozlowski 2024-03-26 11:15 ` Inochi Amaoto 2024-03-26 11:15 ` Inochi Amaoto 2024-03-26 11:31 ` Krzysztof Kozlowski 2024-03-26 11:31 ` Krzysztof Kozlowski 2024-03-26 11:41 ` Inochi Amaoto 2024-03-26 11:41 ` Inochi Amaoto 2024-03-26 11:50 ` Krzysztof Kozlowski [this message] 2024-03-26 11:50 ` Krzysztof Kozlowski 2024-03-26 12:06 ` Inochi Amaoto 2024-03-26 12:06 ` Inochi Amaoto 2024-03-26 12:14 ` Krzysztof Kozlowski 2024-03-26 12:14 ` Krzysztof Kozlowski 2024-03-26 12:19 ` Inochi Amaoto 2024-03-26 12:19 ` Inochi Amaoto 2024-03-26 1:47 ` [PATCH v5 2/3] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Inochi Amaoto 2024-03-26 1:47 ` Inochi Amaoto 2024-03-26 1:47 ` [PATCH v5 3/3] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux Inochi Amaoto 2024-03-26 1:47 ` Inochi Amaoto
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