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From: Inochi Amaoto <inochiama@outlook.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	 Inochi Amaoto <inochiama@outlook.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Chen Wang <unicorn_wang@outlook.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Liu Gui <kenneth.liu@sophgo.com>,
	 Jingbao Qiu <qiujingbao.dlmu@gmail.com>,
	dlan@gentoo.org, dmaengine@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC
Date: Tue, 26 Mar 2024 15:35:57 +0800	[thread overview]
Message-ID: <IA1PR20MB4953EDEEFC3128741F8E152EBB352@IA1PR20MB4953.namprd20.prod.outlook.com> (raw)
In-Reply-To: <57398ee0-212c-4c82-bfed-bf38f4faa111@linaro.org>

On Tue, Mar 26, 2024 at 07:57:44AM +0100, Krzysztof Kozlowski wrote:
> On 26/03/2024 02:47, Inochi Amaoto wrote:
> > The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with
> > an additional channel remap register located in the top system control
> > area. The DMA channel is exclusive to each core.
> > 
> > Add the dmamux binding for CV18XX/SG200X series SoC
> > 
> 
> 
> > +
> > +allOf:
> > +  - $ref: dma-router.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    const: sophgo,cv1800-dmamux
> > +
> > +  reg:
> > +    items:
> > +      - description: DMA channal remapping register
> > +      - description: DMA channel interrupt mapping register
> > +
> > +  '#dma-cells':
> > +    const: 2
> > +    description:
> > +      The first cells is device id. The second one is the cpu id.
> > +
> > +  dma-masters:
> > +    maxItems: 1
> > +
> > +  dma-requests:
> > +    const: 8
> 
> If this is const, why do you need it in the DTS in the first place?
> compatible defines it.
> 

Yes, you are right. I will remove this property.

> > +
> > +required:
> > +  - '#dma-cells'
> > +  - dma-masters
> > +
> 
> 
> I don't understand what happened here. Previously you had a child and I
> proposed to properly describe it with $ref.
> 
> Now, all children are gone. Binding is supposed to be complete. Based on
> your cover letter, this is not complete, but why? What is missing and
> why it cannot be added?
> 

The binding of syscon is removed due to a usb phy subdevices, which needs 
sometime to figure out the actual property. This is why the syscon binding 
is removed.

I think it is better to use the origianl syscon series to evolve after
the usb phy binding is submitted. The subdevices of syscon may need
much reverse engineering to know its parameters. So at least for now,
the syscon binding is hard to be complete.

> 
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    dma-router {
> > +      compatible = "sophgo,cv1800-dmamux";
> > +      #dma-cells = <2>;
> > +      dma-masters = <&dmac>;
> > +      dma-requests = <8>;
> > +    };
> > diff --git a/include/dt-bindings/dma/cv1800-dma.h b/include/dt-bindings/dma/cv1800-dma.h
> > new file mode 100644
> > index 000000000000..3ce9dac25259
> > --- /dev/null
> > +++ b/include/dt-bindings/dma/cv1800-dma.h
> 
> Filename should match bindings filename.
> 

Thanks.

> 
> Anyway, the problem is that it is a dead header. I don't see it being
> used, so it is not a binding.
> 

This header is not used because the dmamux node is not defined at now.
And considering the limitation of this dmamux, maybe only devices that 
require dma as a must can have the dma assigned. 
Due to the fact, I think it may be a long time to wait for this header
to be used as the binding header.

> 
> 
> Best regards,
> Krzysztof
> 

WARNING: multiple messages have this Message-ID (diff)
From: Inochi Amaoto <inochiama@outlook.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	 Inochi Amaoto <inochiama@outlook.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Chen Wang <unicorn_wang@outlook.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Liu Gui <kenneth.liu@sophgo.com>,
	 Jingbao Qiu <qiujingbao.dlmu@gmail.com>,
	dlan@gentoo.org, dmaengine@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC
Date: Tue, 26 Mar 2024 15:35:57 +0800	[thread overview]
Message-ID: <IA1PR20MB4953EDEEFC3128741F8E152EBB352@IA1PR20MB4953.namprd20.prod.outlook.com> (raw)
In-Reply-To: <57398ee0-212c-4c82-bfed-bf38f4faa111@linaro.org>

On Tue, Mar 26, 2024 at 07:57:44AM +0100, Krzysztof Kozlowski wrote:
> On 26/03/2024 02:47, Inochi Amaoto wrote:
> > The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with
> > an additional channel remap register located in the top system control
> > area. The DMA channel is exclusive to each core.
> > 
> > Add the dmamux binding for CV18XX/SG200X series SoC
> > 
> 
> 
> > +
> > +allOf:
> > +  - $ref: dma-router.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    const: sophgo,cv1800-dmamux
> > +
> > +  reg:
> > +    items:
> > +      - description: DMA channal remapping register
> > +      - description: DMA channel interrupt mapping register
> > +
> > +  '#dma-cells':
> > +    const: 2
> > +    description:
> > +      The first cells is device id. The second one is the cpu id.
> > +
> > +  dma-masters:
> > +    maxItems: 1
> > +
> > +  dma-requests:
> > +    const: 8
> 
> If this is const, why do you need it in the DTS in the first place?
> compatible defines it.
> 

Yes, you are right. I will remove this property.

> > +
> > +required:
> > +  - '#dma-cells'
> > +  - dma-masters
> > +
> 
> 
> I don't understand what happened here. Previously you had a child and I
> proposed to properly describe it with $ref.
> 
> Now, all children are gone. Binding is supposed to be complete. Based on
> your cover letter, this is not complete, but why? What is missing and
> why it cannot be added?
> 

The binding of syscon is removed due to a usb phy subdevices, which needs 
sometime to figure out the actual property. This is why the syscon binding 
is removed.

I think it is better to use the origianl syscon series to evolve after
the usb phy binding is submitted. The subdevices of syscon may need
much reverse engineering to know its parameters. So at least for now,
the syscon binding is hard to be complete.

> 
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    dma-router {
> > +      compatible = "sophgo,cv1800-dmamux";
> > +      #dma-cells = <2>;
> > +      dma-masters = <&dmac>;
> > +      dma-requests = <8>;
> > +    };
> > diff --git a/include/dt-bindings/dma/cv1800-dma.h b/include/dt-bindings/dma/cv1800-dma.h
> > new file mode 100644
> > index 000000000000..3ce9dac25259
> > --- /dev/null
> > +++ b/include/dt-bindings/dma/cv1800-dma.h
> 
> Filename should match bindings filename.
> 

Thanks.

> 
> Anyway, the problem is that it is a dead header. I don't see it being
> used, so it is not a binding.
> 

This header is not used because the dmamux node is not defined at now.
And considering the limitation of this dmamux, maybe only devices that 
require dma as a must can have the dma assigned. 
Due to the fact, I think it may be a long time to wait for this header
to be used as the binding header.

> 
> 
> Best regards,
> Krzysztof
> 

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2024-03-26  7:35 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-26  1:44 [PATCH v5 0/3] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto
2024-03-26  1:44 ` Inochi Amaoto
2024-03-26  1:47 ` [PATCH v5 1/3] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto
2024-03-26  1:47   ` Inochi Amaoto
2024-03-26  3:37   ` Frank Li
2024-03-26  3:37     ` Frank Li
2024-03-26  3:49     ` Inochi Amaoto
2024-03-26  3:49       ` Inochi Amaoto
2024-03-26  6:50     ` Krzysztof Kozlowski
2024-03-26  6:50       ` Krzysztof Kozlowski
2024-03-26  6:51     ` Krzysztof Kozlowski
2024-03-26  6:51       ` Krzysztof Kozlowski
2024-03-26  6:57   ` Krzysztof Kozlowski
2024-03-26  6:57     ` Krzysztof Kozlowski
2024-03-26  7:35     ` Inochi Amaoto [this message]
2024-03-26  7:35       ` Inochi Amaoto
2024-03-26  8:53       ` Krzysztof Kozlowski
2024-03-26  8:53         ` Krzysztof Kozlowski
2024-03-26 11:15         ` Inochi Amaoto
2024-03-26 11:15           ` Inochi Amaoto
2024-03-26 11:31           ` Krzysztof Kozlowski
2024-03-26 11:31             ` Krzysztof Kozlowski
2024-03-26 11:41             ` Inochi Amaoto
2024-03-26 11:41               ` Inochi Amaoto
2024-03-26 11:50               ` Krzysztof Kozlowski
2024-03-26 11:50                 ` Krzysztof Kozlowski
2024-03-26 12:06                 ` Inochi Amaoto
2024-03-26 12:06                   ` Inochi Amaoto
2024-03-26 12:14                   ` Krzysztof Kozlowski
2024-03-26 12:14                     ` Krzysztof Kozlowski
2024-03-26 12:19                     ` Inochi Amaoto
2024-03-26 12:19                       ` Inochi Amaoto
2024-03-26  1:47 ` [PATCH v5 2/3] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Inochi Amaoto
2024-03-26  1:47   ` Inochi Amaoto
2024-03-26  1:47 ` [PATCH v5 3/3] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux Inochi Amaoto
2024-03-26  1:47   ` Inochi Amaoto

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