[PATCH V3 1/9] spi: tegra114: fix PIO transfer

From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: thierry.reding@gmail.com, jonathanh@nvidia.com, talho@nvidia.com,
	skomatineni@nvidia.com, broonie@kernel.org, robh+dt@kernel.org,
	mark.rutland@arm.com, kyarlagadda@nvidia.com
Cc: ldewangan@nvidia.com, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: [PATCH V3 1/9] spi: tegra114: fix PIO transfer
Date: Mon, 15 Apr 2019 14:30:26 -0700	[thread overview]
Message-ID: <1555363834-32155-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1555363834-32155-1-git-send-email-skomatineni@nvidia.com>

This patch fixes PIO mode transfer to use PIO bit in SPI_COMMAND1 register.
Current driver uses DMA_EN instead of PIO bit.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/spi/spi-tegra114.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index b8c6393e2190..b1f31bb16659 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -651,8 +651,9 @@ static int tegra_spi_start_cpu_based_transfer(
 
 	tspi->is_curr_dma_xfer = false;
 
-	val |= SPI_DMA_EN;
-	tegra_spi_writel(tspi, val, SPI_DMA_CTL);
+	val = tspi->command1_reg;
+	val |= SPI_PIO;
+	tegra_spi_writel(tspi, val, SPI_COMMAND1);
 	return 0;
 }
 
-- 
2.7.4
