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From: Mark Brown <broonie@kernel.org>
Cc: broonie@kernel.org, devicetree@vger.kernel.org,
	jonathanh@nvidia.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org,
	linux-tegra@vger.kernel.orgMark Brown <broonie@kernel.org>,
	mark.rutland@arm.com, robh+dt@kernel.org, skomatineni@nvidia.com,
	talho@nvidia.com, thierry.reding@gmail.com
Subject: Applied "spi: expand mode support" to the spi tree
Date: Thu, 18 Apr 2019 11:26:08 +0100 (BST)	[thread overview]
Message-ID: <20190418102608.0CC9F1126DCF@debutante.sirena.org.uk> (raw)
In-Reply-To: <1555363834-32155-3-git-send-email-skomatineni@nvidia.com>

The patch

   spi: expand mode support

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 4b490710d4d24f95e95a07baac6f3f98bb94cf3b Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Mon, 15 Apr 2019 14:30:27 -0700
Subject: [PATCH] spi: expand mode support

This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/linux/spi/spi.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 589f9dc9ac2b..053abd22ad31 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -143,7 +143,7 @@ struct spi_device {
 	u32			max_speed_hz;
 	u8			chip_select;
 	u8			bits_per_word;
-	u16			mode;
+	u32			mode;
 #define	SPI_CPHA	0x01			/* clock phase */
 #define	SPI_CPOL	0x02			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
 	u16			dma_alignment;
 
 	/* spi_device.mode flags understood by this controller driver */
-	u16			mode_bits;
+	u32			mode_bits;
 
 	/* bitmask of supported bits_per_word for transfers */
 	u32			bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
 	/* mode becomes spi_device.mode, and is essential for chips
 	 * where the default of SPI_CS_HIGH = 0 is wrong.
 	 */
-	u16		mode;
+	u32		mode;
 
 	/* ... may need additional spi_device chip config data here.
 	 * avoid stuff protocol drivers can set; but include stuff
-- 
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: broonie@kernel.org, devicetree@vger.kernel.org,
	jonathanh@nvidia.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
	Mark Brown <broonie@kernel.org>,
	mark.rutland@arm.com, robh+dt@kernel.org, skomatineni@nvidia.com,
	talho@nvidia.com, thierry.reding@gmail.com
Subject: Applied "spi: expand mode support" to the spi tree
Date: Thu, 18 Apr 2019 11:26:08 +0100 (BST)	[thread overview]
Message-ID: <20190418102608.0CC9F1126DCF@debutante.sirena.org.uk> (raw)
In-Reply-To: <1555363834-32155-3-git-send-email-skomatineni@nvidia.com>

The patch

   spi: expand mode support

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 4b490710d4d24f95e95a07baac6f3f98bb94cf3b Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Mon, 15 Apr 2019 14:30:27 -0700
Subject: [PATCH] spi: expand mode support

This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/linux/spi/spi.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 589f9dc9ac2b..053abd22ad31 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -143,7 +143,7 @@ struct spi_device {
 	u32			max_speed_hz;
 	u8			chip_select;
 	u8			bits_per_word;
-	u16			mode;
+	u32			mode;
 #define	SPI_CPHA	0x01			/* clock phase */
 #define	SPI_CPOL	0x02			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
 	u16			dma_alignment;
 
 	/* spi_device.mode flags understood by this controller driver */
-	u16			mode_bits;
+	u32			mode_bits;
 
 	/* bitmask of supported bits_per_word for transfers */
 	u32			bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
 	/* mode becomes spi_device.mode, and is essential for chips
 	 * where the default of SPI_CS_HIGH = 0 is wrong.
 	 */
-	u16		mode;
+	u32		mode;
 
 	/* ... may need additional spi_device chip config data here.
 	 * avoid stuff protocol drivers can set; but include stuff
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
Cc: broonie@kernel.org, devicetree@vger.kernel.org,
	jonathanh@nvidia.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org,
	linux-tegra@vger.kernel.orgMark Brown <broonie@kernel.org>,
	mark.rutland@arm.com, robh+dt@kernel.org, skomatineni@nvidia.com,
	talho@nvidia.com, thierry.reding@gmail.com
Subject: Applied "spi: expand mode support" to the spi tree
Date: Thu, 18 Apr 2019 11:26:08 +0100 (BST)	[thread overview]
Message-ID: <20190418102608.0CC9F1126DCF@debutante.sirena.org.uk> (raw)
In-Reply-To: <1555363834-32155-3-git-send-email-skomatineni@nvidia.com>

The patch

   spi: expand mode support

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 4b490710d4d24f95e95a07baac6f3f98bb94cf3b Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Mon, 15 Apr 2019 14:30:27 -0700
Subject: [PATCH] spi: expand mode support

This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/linux/spi/spi.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 589f9dc9ac2b..053abd22ad31 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -143,7 +143,7 @@ struct spi_device {
 	u32			max_speed_hz;
 	u8			chip_select;
 	u8			bits_per_word;
-	u16			mode;
+	u32			mode;
 #define	SPI_CPHA	0x01			/* clock phase */
 #define	SPI_CPOL	0x02			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
 	u16			dma_alignment;
 
 	/* spi_device.mode flags understood by this controller driver */
-	u16			mode_bits;
+	u32			mode_bits;
 
 	/* bitmask of supported bits_per_word for transfers */
 	u32			bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
 	/* mode becomes spi_device.mode, and is essential for chips
 	 * where the default of SPI_CS_HIGH = 0 is wrong.
 	 */
-	u16		mode;
+	u32		mode;
 
 	/* ... may need additional spi_device chip config data here.
 	 * avoid stuff protocol drivers can set; but include stuff
-- 
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: broonie@kernel.org, devicetree@vger.kernel.org,
	jonathanh@nvidia.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
	Mark Brown <broonie@kernel.org>,
	mark.rutland@arm.com, robh+dt@kernel.org, skomatineni@nvidia.com,
	talho@nvidia.com, thierry.reding@gmail.com
Subject: Applied "spi: expand mode support" to the spi tree
Date: Thu, 18 Apr 2019 11:26:08 +0100 (BST)	[thread overview]
Message-ID: <20190418102608.0CC9F1126DCF@debutante.sirena.org.uk> (raw)
In-Reply-To: <1555363834-32155-3-git-send-email-skomatineni@nvidia.com>

The patch

   spi: expand mode support

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 4b490710d4d24f95e95a07baac6f3f98bb94cf3b Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Mon, 15 Apr 2019 14:30:27 -0700
Subject: [PATCH] spi: expand mode support

This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/linux/spi/spi.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 589f9dc9ac2b..053abd22ad31 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -143,7 +143,7 @@ struct spi_device {
 	u32			max_speed_hz;
 	u8			chip_select;
 	u8			bits_per_word;
-	u16			mode;
+	u32			mode;
 #define	SPI_CPHA	0x01			/* clock phase */
 #define	SPI_CPOL	0x02			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
 	u16			dma_alignment;
 
 	/* spi_device.mode flags understood by this controller driver */
-	u16			mode_bits;
+	u32			mode_bits;
 
 	/* bitmask of supported bits_per_word for transfers */
 	u32			bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
 	/* mode becomes spi_device.mode, and is essential for chips
 	 * where the default of SPI_CS_HIGH = 0 is wrong.
 	 */
-	u16		mode;
+	u32		mode;
 
 	/* ... may need additional spi_device chip config data here.
 	 * avoid stuff protocol drivers can set; but include stuff
-- 
2.20.1

  reply	other threads:[~2019-04-18 10:26 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-15 21:30 [PATCH V3 0/9] bug fixes and more features to Tegra SPI Sowjanya Komatineni
2019-04-15 21:30 ` Sowjanya Komatineni
2019-04-15 21:30 ` [PATCH V3 1/9] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-16 16:32   ` Applied "spi: tegra114: fix PIO transfer" to the spi tree Mark Brown
2019-04-16 16:32     ` Mark Brown
2019-04-16 16:32     ` Mark Brown
2019-04-16 16:32     ` Mark Brown
2019-04-29 21:42     ` Sowjanya Komatineni
2019-05-02  2:42       ` Mark Brown
2019-04-15 21:30 ` [PATCH V3 2/9] spi: expand mode support Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-18 10:26   ` Mark Brown [this message]
2019-04-18 10:26     ` Applied "spi: expand mode support" to the spi tree Mark Brown
2019-04-18 10:26     ` Mark Brown
2019-04-18 10:26     ` Mark Brown
2019-05-02  2:19   ` Mark Brown
2019-05-02  2:19     ` Mark Brown
2019-05-02  2:19     ` Mark Brown
2019-05-02  2:19     ` Mark Brown
2019-04-15 21:30 ` [PATCH V3 3/9] spi: add SPI_LSBYTE_FIRST mode Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-19 15:22   ` Mark Brown
2019-04-27  0:32     ` Sowjanya Komatineni
2019-05-06  4:49       ` Mark Brown
2019-04-15 21:30 ` [PATCH V3 4/9] spi: tegra114: add support for Tegra SPI LSBYTE_FIRST Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-15 21:30 ` [PATCH V3 5/9] spi: export spi core function spi_set_cs Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-19 15:18   ` Mark Brown
2019-04-29 22:02     ` Sowjanya Komatineni
2019-05-06  4:44       ` Mark Brown
2019-05-10 18:53         ` Sowjanya Komatineni
2019-05-12  3:12           ` Mark Brown
2019-04-15 21:30 ` [PATCH V3 6/9] spi: tegra114: add support for gpio based CS Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-15 21:30 ` [PATCH V3 7/9] spi: tegra114: add support for hw based cs Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-15 21:30 ` [PATCH V3 8/9] spi: tegra114: add support for HW CS timing Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni
2019-04-15 21:30 ` [PATCH V3 9/9] spi: tegra114: add support for TX and RX trimmers Sowjanya Komatineni
2019-04-15 21:30   ` Sowjanya Komatineni

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