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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 17/18] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset
Date: Wed, 17 Jun 2015 18:37:03 +0100	[thread overview]
Message-ID: <20150617173703.GO24012@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <20150617150319.GC23637@phenom.ffwll.local>

On Wed, Jun 17, 2015 at 05:03:19PM +0200, Daniel Vetter wrote:
> On Wed, Jun 17, 2015 at 01:53:17PM +0100, Chris Wilson wrote:
> > On Wed, Jun 17, 2015 at 02:49:47PM +0200, Daniel Vetter wrote:
> > > On Wed, Jun 10, 2015 at 07:09:03PM +0100, Chris Wilson wrote:
> > > > On Wed, Jun 10, 2015 at 05:46:54PM +0100, Michel Thierry wrote:
> > > > > There are some allocations that must be only referenced by 32bit
> > > > > offsets. To limit the chances of having the first 4GB already full,
> > > > > objects not requiring this workaround use DRM_MM_SEARCH_BELOW/
> > > > > DRM_MM_CREATE_TOP flags
> > > > > 
> > > > > User must pass I915_EXEC_SUPPORTS_48BADDRESS flag to indicate it can
> > > > > be allocated above the 32b address range.
> > > > 
> > > > This should be a per-object flag not per-execbuffer.
> > > 
> > > We need both. This one to opt into the large address space, the per-object
> > > one to apply the w/a. Also libdrm/mesa patches for this are still missing.
> > 
> > Do we need the opt in on the context? The 48bit vm is lazily
> > constructed, if no object asks to use the high range, it will never be
> > populated. Or is there a cost with preparing a 48bit vm?
> 
> If we restrict to 4G we'll evict objects if we run out, and will stay
> correct even when processing fairly large workloads. With just lazily
> eating into 48b that won't be the case. A bit far-fetched, but if we go
> to the trouble of implementing this might as well do it right.

i915_evict_something runs between the range requested for pinning. If we
run out of 4G space and the desired pin does not opt into 48bit, we will
evict from the lower 4G.

I obviously missed your concern. Care to elaborate?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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  reply	other threads:[~2015-06-17 17:37 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-10 16:46 [PATCH v2 00/18] 48-bit PPGTT Michel Thierry
2015-06-10 16:46 ` [PATCH v2 01/18] drm/i915/lrc: Update PDPx registers with lri commands Michel Thierry
2015-06-11 18:04   ` Mika Kuoppala
2015-06-22  9:18     ` Michel Thierry
2015-06-26 12:46   ` [PATCH v3] " Michel Thierry
2015-06-26 14:45     ` Mika Kuoppala
2015-06-10 16:46 ` [PATCH v2 02/18] drm/i915/gtt: Switch gen8_free_page_tables params Michel Thierry
2015-06-11 18:05   ` Mika Kuoppala
2015-06-26 16:38     ` Daniel Vetter
2015-06-10 16:46 ` [PATCH v2 03/18] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-06-10 16:46 ` [PATCH v2 04/18] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-06-10 16:46 ` [PATCH v2 05/18] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-06-10 16:46 ` [PATCH v2 06/18] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-06-10 16:46 ` [PATCH v2 07/18] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-06-10 16:46 ` [PATCH v2 08/18] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-06-10 16:46 ` [PATCH v2 09/18] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-06-10 16:46 ` [PATCH v2 10/18] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-06-10 16:46 ` [PATCH v2 11/18] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-06-10 16:46 ` [PATCH v2 12/18] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-06-10 16:46 ` [PATCH v2 13/18] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-06-10 16:46 ` [PATCH v2 14/18] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-06-10 16:46 ` [PATCH v2 15/18] drm/i915: object size needs to be u64 Michel Thierry
2015-06-10 16:46 ` [PATCH v2 16/18] drm/i915: Check against correct user_size limit in 48b ppgtt mode Michel Thierry
2015-06-10 17:57   ` Chris Wilson
2015-06-10 16:46 ` [PATCH v2 17/18] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-06-10 18:09   ` Chris Wilson
2015-06-17 12:49     ` Daniel Vetter
2015-06-17 12:53       ` Chris Wilson
2015-06-17 15:03         ` Daniel Vetter
2015-06-17 17:37           ` Chris Wilson [this message]
2015-06-18  6:45             ` Daniel Vetter
2015-06-18  7:03               ` Chris Wilson
2015-06-18  7:11                 ` Daniel Vetter
2015-06-18  7:34                   ` Chris Wilson
2015-06-23 12:21   ` [PATCH v3] " Michel Thierry
2015-06-23 13:22     ` Chris Wilson
2015-06-10 16:46 ` [PATCH v2 18/18] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-06-10 16:46 ` [PATCH v2] tests/gem_ppgtt: Check Wa32bitOffsets workarounds Michel Thierry
2015-07-01 15:27 ` [PATCH v3 00/17] 48-bit PPGTT Michel Thierry
2015-07-01 15:27   ` [PATCH v3 01/17] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-01 15:27   ` [PATCH v3 02/17] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-07 12:36     ` Goel, Akash
2015-07-07 12:56       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 03/17] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-07 12:43     ` Goel, Akash
2015-07-07 13:35       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 04/17] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-01 15:27   ` [PATCH v3 05/17] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-07 12:48     ` Goel, Akash
2015-07-07 13:40       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 06/17] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-01 15:27   ` [PATCH v3 07/17] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-01 15:27   ` [PATCH v3 08/17] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-01 15:27   ` [PATCH v3 09/17] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-07 12:51     ` Goel, Akash
2015-07-07 13:42       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 10/17] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-01 15:27   ` [PATCH v3 11/17] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-07 12:53     ` Goel, Akash
2015-07-07 13:50       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 12/17] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-07 12:56     ` Goel, Akash
2015-07-07 13:51       ` Michel Thierry
2015-07-01 15:27   ` [PATCH v3 13/17] drm/i915: object size needs to be u64 Michel Thierry
2015-07-01 15:27   ` [PATCH v3 14/17] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-01 16:07     ` John Harrison
2015-07-01 15:27   ` [PATCH v3 15/17] drm/i915/userptr: Kill user_size limit check Michel Thierry
2015-07-01 15:31     ` Chris Wilson
2015-07-01 15:27   ` [PATCH v3 16/17] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-01 15:43     ` Chris Wilson
2015-07-01 15:54       ` Michel Thierry
2015-07-01 16:02     ` [PATCH v5] " Michel Thierry
2015-07-01 15:27   ` [PATCH v3 17/17] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-01 15:38   ` [PATCH v3 00/17] 48-bit PPGTT Daniel Vetter

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