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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Jean-Francois Moine <moinejf@free.fr>
Cc: "Jens Kuske" <jenskuske@gmail.com>,
	devicetree@vger.kernel.org,
	"Vishnu Patekar" <vishnupatekar0510@gmail.com>,
	"Emilio López" <emilio@elopez.com.ar>,
	"Michael Turquette" <mturquette@baylibre.com>,
	linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
	"Hans de Goede" <hdegoede@redhat.com>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 11:14:10 +0200	[thread overview]
Message-ID: <20151022091410.GW10947@lukather> (raw)
In-Reply-To: <20151022105745.2cc158a3@OPI2>

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On Thu, Oct 22, 2015 at 10:57:45AM +0200, Jean-Francois Moine wrote:
> On Thu, 22 Oct 2015 10:47:35 +0200
> Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> 
> > Not really. The uart0 reset is the bit 16, in the reset register 4.
> > 
> > 4 * 32 + 16 = 44.
> > 
> > Not 112, but still not 208 either.
> 
> The registers are numbered 1..5, then
> 
> (4 - 1) * 32 + 16 = 112

Not on my version, and even then, UARTs are on the last reset
register, which would still make 144.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
Cc: "Jens Kuske" <jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	"Vishnu Patekar"
	<vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
	"Michael Turquette"
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	"Hans de Goede"
	<hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	"Chen-Yu Tsai" <wens-jdAy2FN1RRM@public.gmane.org>,
	"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Philipp Zabel" <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"Linus Walleij"
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 11:14:10 +0200	[thread overview]
Message-ID: <20151022091410.GW10947@lukather> (raw)
In-Reply-To: <20151022105745.2cc158a3@OPI2>

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On Thu, Oct 22, 2015 at 10:57:45AM +0200, Jean-Francois Moine wrote:
> On Thu, 22 Oct 2015 10:47:35 +0200
> Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> 
> > Not really. The uart0 reset is the bit 16, in the reset register 4.
> > 
> > 4 * 32 + 16 = 44.
> > 
> > Not 112, but still not 208 either.
> 
> The registers are numbered 1..5, then
> 
> (4 - 1) * 32 + 16 = 112

Not on my version, and even then, UARTs are on the last reset
register, which would still make 144.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 11:14:10 +0200	[thread overview]
Message-ID: <20151022091410.GW10947@lukather> (raw)
In-Reply-To: <20151022105745.2cc158a3@OPI2>

On Thu, Oct 22, 2015 at 10:57:45AM +0200, Jean-Francois Moine wrote:
> On Thu, 22 Oct 2015 10:47:35 +0200
> Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> 
> > Not really. The uart0 reset is the bit 16, in the reset register 4.
> > 
> > 4 * 32 + 16 = 44.
> > 
> > Not 112, but still not 208 either.
> 
> The registers are numbered 1..5, then
> 
> (4 - 1) * 32 + 16 = 112

Not on my version, and even then, UARTs are on the last reset
register, which would still make 144.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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  reply	other threads:[~2015-10-22  9:16 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-21 16:20 [PATCH 4/6] reset: sunxi: Add compatible for Allwinner H3 bus resets Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI Jens Kuske
2015-10-21 16:20   ` Jens Kuske
2015-10-21 16:20   ` Jens Kuske
2015-10-22  8:05   ` Maxime Ripard
2015-10-22  8:05     ` Maxime Ripard
2015-10-22  8:05     ` Maxime Ripard
2015-10-22  8:29     ` Jean-Francois Moine
2015-10-22  8:29       ` Jean-Francois Moine
2015-10-22  8:29       ` Jean-Francois Moine
2015-10-22  8:47       ` Maxime Ripard
2015-10-22  8:47         ` Maxime Ripard
2015-10-22  8:47         ` Maxime Ripard
2015-10-22  8:57         ` Jean-Francois Moine
2015-10-22  8:57           ` Jean-Francois Moine
2015-10-22  8:57           ` Jean-Francois Moine
2015-10-22  9:14           ` Maxime Ripard [this message]
2015-10-22  9:14             ` Maxime Ripard
2015-10-22  9:14             ` Maxime Ripard
2015-10-22 11:30             ` Jens Kuske
2015-10-22 11:30               ` Jens Kuske
2015-10-22 11:30               ` Jens Kuske
2015-10-23 18:09               ` Maxime Ripard
2015-10-23 18:09                 ` Maxime Ripard
2015-10-23 18:09                 ` Maxime Ripard
2015-10-22 17:30   ` Jean-Francois Moine
2015-10-22 17:30     ` Jean-Francois Moine
2015-10-22 17:30     ` Jean-Francois Moine
2015-10-23 18:14   ` Maxime Ripard
2015-10-23 18:14     ` Maxime Ripard
2015-10-23 18:14     ` Maxime Ripard
2015-10-23 19:20     ` Jean-Francois Moine
2015-10-23 19:20       ` Jean-Francois Moine
2015-10-23 19:20       ` Jean-Francois Moine
2015-10-24  7:13       ` Maxime Ripard
2015-10-24  7:13         ` Maxime Ripard
2015-10-24  7:13         ` Maxime Ripard
2015-10-24  8:47         ` Jean-Francois Moine
2015-10-24  8:47           ` Jean-Francois Moine
2015-10-24  8:47           ` Jean-Francois Moine
2015-10-26 21:06           ` Maxime Ripard
2015-10-26 21:06             ` Maxime Ripard
2015-10-26 21:06             ` Maxime Ripard
2015-10-27  8:12             ` [linux-sunxi] " Hans de Goede
2015-10-27  8:12               ` Hans de Goede
2015-10-27  8:12               ` Hans de Goede
2015-10-24  8:39     ` [linux-sunxi] " Hans de Goede
2015-10-24  8:39       ` Hans de Goede
2015-10-24  8:39       ` Hans de Goede
2015-10-26 21:00       ` [linux-sunxi] " Maxime Ripard
2015-10-26 21:00         ` Maxime Ripard
2015-10-26 21:00         ` Maxime Ripard
2015-10-21 16:20 ` [PATCH 6/6] ARM: dts: sun8i: Add Orange Pi Plus support Jens Kuske
2015-10-21 16:20   ` Jens Kuske
2015-10-21 16:20   ` Jens Kuske
2015-10-22  7:58 ` [PATCH 4/6] reset: sunxi: Add compatible for Allwinner H3 bus resets Maxime Ripard
2015-10-22  7:58   ` Maxime Ripard
2015-10-22  7:58   ` Maxime Ripard
2015-10-27 16:54   ` Jens Kuske
2015-10-27 16:54     ` Jens Kuske
2015-10-27 16:54     ` Jens Kuske
  -- strict thread matches above, loose matches on Subject: below --
2015-05-06  9:31 [PATCH 0/6] ARM: sunxi: Introduce Allwinner H3 support Jens Kuske
2015-05-06  9:31 ` [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI Jens Kuske
2015-05-06  9:31   ` Jens Kuske
2015-05-06  9:31   ` Jens Kuske
2015-05-06 12:19   ` Maxime Ripard
2015-05-06 12:19     ` Maxime Ripard
2015-05-06 12:19     ` Maxime Ripard
2015-05-06 20:47     ` Jens Kuske
2015-05-06 20:47       ` Jens Kuske
2015-05-06 20:47       ` Jens Kuske
2015-05-09 11:44       ` Maxime Ripard
2015-05-09 11:44         ` Maxime Ripard
2015-05-09 11:44         ` Maxime Ripard
2015-05-11  8:11         ` Chen-Yu Tsai
2015-05-11  8:11           ` Chen-Yu Tsai
2015-05-11  8:11           ` Chen-Yu Tsai

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