From: Thierry Reding <thierry.reding@gmail.com>
To: Zhi Mao <zhi.mao@mediatek.com>
Cc: john@phrozen.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-pwm@vger.kernel.org, srv_heupstream@mediatek.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com,
yt.shen@mediatek.com, sean.wang@mediatek.com,
zhenbao.liu@mediatek.com
Subject: Re: [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection
Date: Mon, 21 Aug 2017 09:35:16 +0200 [thread overview]
Message-ID: <20170821073516.GL18996@ulmo> (raw)
In-Reply-To: <1498802721-32455-3-git-send-email-zhi.mao@mediatek.com>
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On Fri, Jun 30, 2017 at 02:05:17PM +0800, Zhi Mao wrote:
> In original code, the pwm output frequency is not correct
> when set bit<3>=1 to PWMCON register.
>
> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
> ---
> drivers/pwm/pwm-mediatek.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to for-4.14/drivers, thanks.
Thierry
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From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Zhi Mao <zhi.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Cc: john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Matthias Brugger
<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
zhenbao.liu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org
Subject: Re: [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection
Date: Mon, 21 Aug 2017 09:35:16 +0200 [thread overview]
Message-ID: <20170821073516.GL18996@ulmo> (raw)
In-Reply-To: <1498802721-32455-3-git-send-email-zhi.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
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On Fri, Jun 30, 2017 at 02:05:17PM +0800, Zhi Mao wrote:
> In original code, the pwm output frequency is not correct
> when set bit<3>=1 to PWMCON register.
>
> Signed-off-by: Zhi Mao <zhi.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> ---
> drivers/pwm/pwm-mediatek.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to for-4.14/drivers, thanks.
Thierry
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From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection
Date: Mon, 21 Aug 2017 09:35:16 +0200 [thread overview]
Message-ID: <20170821073516.GL18996@ulmo> (raw)
In-Reply-To: <1498802721-32455-3-git-send-email-zhi.mao@mediatek.com>
On Fri, Jun 30, 2017 at 02:05:17PM +0800, Zhi Mao wrote:
> In original code, the pwm output frequency is not correct
> when set bit<3>=1 to PWMCON register.
>
> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
> ---
> drivers/pwm/pwm-mediatek.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to for-4.14/drivers, thanks.
Thierry
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next prev parent reply other threads:[~2017-08-21 7:35 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-30 6:05 [PATCH v3 0/6] mediatek: pwm driver add MT2712/MT7622 support Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` [PATCH v3 1/6] pwm: kconfig: modify mediatek information Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-08-21 7:31 ` Thierry Reding
2017-08-21 7:31 ` Thierry Reding
2017-06-30 6:05 ` [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-07-05 11:09 ` Matthias Brugger
2017-07-05 11:09 ` Matthias Brugger
2017-07-06 6:16 ` Zhi Mao
2017-07-06 6:16 ` Zhi Mao
2017-07-06 6:16 ` Zhi Mao
2017-07-06 6:43 ` Zhi Mao
2017-07-06 6:43 ` Zhi Mao
2017-07-06 6:43 ` Zhi Mao
2017-07-18 16:34 ` Matthias Brugger
2017-07-18 16:34 ` Matthias Brugger
2017-08-21 7:35 ` Thierry Reding [this message]
2017-08-21 7:35 ` Thierry Reding
2017-08-21 7:35 ` Thierry Reding
2017-06-30 6:05 ` [PATCH v3 3/6] pwm: mediatek: fix clock control issue Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-08-21 7:47 ` Thierry Reding
2017-08-21 7:47 ` Thierry Reding
2017-08-21 7:47 ` Thierry Reding
2017-06-30 6:05 ` [PATCH v3 4/6] pwm: bindings: add MT2712/MT7622 information Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-08-21 7:51 ` Thierry Reding
2017-08-21 7:51 ` Thierry Reding
2017-06-30 6:05 ` [PATCH v3 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-08-21 7:58 ` Thierry Reding
2017-08-21 7:58 ` Thierry Reding
2017-06-30 6:05 ` [PATCH v3 6/6] pwm: mediatek: add MT2712/MT7622 support Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-06-30 6:05 ` Zhi Mao
2017-08-21 8:05 ` Thierry Reding
2017-08-21 8:05 ` Thierry Reding
2017-08-21 9:05 ` Zhi Mao
2017-08-21 9:05 ` Zhi Mao
2017-08-21 9:05 ` Zhi Mao
2017-07-17 3:16 ` [PATCH v3 0/6] mediatek: pwm driver " Zhi Mao
2017-07-17 3:16 ` Zhi Mao
2017-07-17 3:16 ` Zhi Mao
2017-08-02 7:19 ` Zhi Mao
2017-08-02 7:19 ` Zhi Mao
2017-08-02 7:19 ` Zhi Mao
2017-08-02 8:42 ` John Crispin
2017-08-02 8:42 ` John Crispin
2017-08-02 8:42 ` John Crispin
2017-08-03 9:41 ` Zhi Mao
2017-08-03 9:41 ` Zhi Mao
2017-08-03 9:41 ` Zhi Mao
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