From: Ladislav Michl <ladis@linux-mips.org>
To: linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org
Cc: Tony Lindgren <tony@atomide.com>,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Roger Quadros <rogerq@ti.com>
Subject: [PATCH v4 08/16] mtd: onenand: omap2: Simplify the DMA setup for various paths
Date: Sat, 11 Nov 2017 22:21:53 +0100 [thread overview]
Message-ID: <20171111212153.ldift2s3ycchsc2e@lenoch> (raw)
In-Reply-To: <20171111211206.465pgorrjp3eyix6@lenoch>
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
We have 4 functions containing almost identical DMA setup code. Create one
function which can set up the DMA for both read and write and use this in
place for the setup code in the driver.
The new function will use wait_for_completion_io_timeout() and it will
figure out the best data_type to be used for the transfer instead of
hardwiring 32 or 16 bit data.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
---
Changes:
-v4: new patch
drivers/mtd/onenand/omap2.c | 109 ++++++++++++++++++--------------------------
1 file changed, 45 insertions(+), 64 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 0e7772e16d75..d22163271dc9 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -288,6 +288,33 @@ static inline int omap2_onenand_bufferram_offset(struct mtd_info *mtd, int area)
return 0;
}
+static inline int omap2_onenand_dma_transfer(struct omap2_onenand *c,
+ dma_addr_t src, dma_addr_t dst,
+ size_t count)
+{
+ int data_type = __ffs((src | dst | count));
+
+ if (data_type > OMAP_DMA_DATA_TYPE_S32)
+ data_type = OMAP_DMA_DATA_TYPE_S32;
+
+ omap_set_dma_transfer_params(c->dma_channel, data_type,
+ count / BIT(data_type), 1, 0, 0, 0);
+ omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
+ src, 0, 0);
+ omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
+ dst, 0, 0);
+
+ reinit_completion(&c->dma_done);
+ omap_start_dma(c->dma_channel);
+ if (!wait_for_completion_io_timeout(&c->dma_done,
+ msecs_to_jiffies(20))) {
+ omap_stop_dma(c->dma_channel);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
#if defined(CONFIG_ARCH_OMAP3) || defined(MULTI_OMAP2)
static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
@@ -298,10 +325,9 @@ static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
int bram_offset;
- unsigned long timeout;
void *buf = (void *)buffer;
size_t xtra;
- volatile unsigned *done;
+ int ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
if (bram_offset & 3 || (size_t)buf & 3 || count < 384)
@@ -338,25 +364,10 @@ static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
goto out_copy;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count >> 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
-
- timeout = jiffies + msecs_to_jiffies(20);
- done = &c->dma_done.done;
- while (time_before(jiffies, timeout))
- if (*done)
- break;
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_dst, count, DMA_FROM_DEVICE);
- if (!*done) {
+ if (ret) {
dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
goto out_copy;
}
@@ -376,9 +387,8 @@ static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
int bram_offset;
- unsigned long timeout;
void *buf = (void *)buffer;
- volatile unsigned *done;
+ int ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
if (bram_offset & 3 || (size_t)buf & 3 || count < 384)
@@ -409,25 +419,10 @@ static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count >> 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
-
- timeout = jiffies + msecs_to_jiffies(20);
- done = &c->dma_done.done;
- while (time_before(jiffies, timeout))
- if (*done)
- break;
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_src, count, DMA_TO_DEVICE);
- if (!*done) {
+ if (ret) {
dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
goto out_copy;
}
@@ -466,7 +461,7 @@ static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
- int bram_offset;
+ int bram_offset, ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
/* DMA is not used. Revisit PM requirements before enabling it. */
@@ -488,20 +483,13 @@ static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count / 4, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
- wait_for_completion(&c->dma_done);
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_dst, count, DMA_FROM_DEVICE);
- return 0;
+ if (ret)
+ dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
+
+ return ret;
}
static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
@@ -511,7 +499,7 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
- int bram_offset;
+ int bram_offset, ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
/* DMA is not used. Revisit PM requirements before enabling it. */
@@ -533,20 +521,13 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S16,
- count / 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
- wait_for_completion(&c->dma_done);
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_src, count, DMA_TO_DEVICE);
- return 0;
+ if (ret)
+ dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
+
+ return ret;
}
#else
--
2.11.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Ladislav Michl <ladis@linux-mips.org>
To: linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org
Cc: Roger Quadros <rogerq@ti.com>, Tony Lindgren <tony@atomide.com>,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Kyungmin Park <kyungmin.park@samsung.com>
Subject: [PATCH v4 08/16] mtd: onenand: omap2: Simplify the DMA setup for various paths
Date: Sat, 11 Nov 2017 22:21:53 +0100 [thread overview]
Message-ID: <20171111212153.ldift2s3ycchsc2e@lenoch> (raw)
In-Reply-To: <20171111211206.465pgorrjp3eyix6@lenoch>
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
We have 4 functions containing almost identical DMA setup code. Create one
function which can set up the DMA for both read and write and use this in
place for the setup code in the driver.
The new function will use wait_for_completion_io_timeout() and it will
figure out the best data_type to be used for the transfer instead of
hardwiring 32 or 16 bit data.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
---
Changes:
-v4: new patch
drivers/mtd/onenand/omap2.c | 109 ++++++++++++++++++--------------------------
1 file changed, 45 insertions(+), 64 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 0e7772e16d75..d22163271dc9 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -288,6 +288,33 @@ static inline int omap2_onenand_bufferram_offset(struct mtd_info *mtd, int area)
return 0;
}
+static inline int omap2_onenand_dma_transfer(struct omap2_onenand *c,
+ dma_addr_t src, dma_addr_t dst,
+ size_t count)
+{
+ int data_type = __ffs((src | dst | count));
+
+ if (data_type > OMAP_DMA_DATA_TYPE_S32)
+ data_type = OMAP_DMA_DATA_TYPE_S32;
+
+ omap_set_dma_transfer_params(c->dma_channel, data_type,
+ count / BIT(data_type), 1, 0, 0, 0);
+ omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
+ src, 0, 0);
+ omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
+ dst, 0, 0);
+
+ reinit_completion(&c->dma_done);
+ omap_start_dma(c->dma_channel);
+ if (!wait_for_completion_io_timeout(&c->dma_done,
+ msecs_to_jiffies(20))) {
+ omap_stop_dma(c->dma_channel);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
#if defined(CONFIG_ARCH_OMAP3) || defined(MULTI_OMAP2)
static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
@@ -298,10 +325,9 @@ static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
int bram_offset;
- unsigned long timeout;
void *buf = (void *)buffer;
size_t xtra;
- volatile unsigned *done;
+ int ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
if (bram_offset & 3 || (size_t)buf & 3 || count < 384)
@@ -338,25 +364,10 @@ static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
goto out_copy;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count >> 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
-
- timeout = jiffies + msecs_to_jiffies(20);
- done = &c->dma_done.done;
- while (time_before(jiffies, timeout))
- if (*done)
- break;
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_dst, count, DMA_FROM_DEVICE);
- if (!*done) {
+ if (ret) {
dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
goto out_copy;
}
@@ -376,9 +387,8 @@ static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
int bram_offset;
- unsigned long timeout;
void *buf = (void *)buffer;
- volatile unsigned *done;
+ int ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
if (bram_offset & 3 || (size_t)buf & 3 || count < 384)
@@ -409,25 +419,10 @@ static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count >> 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
-
- timeout = jiffies + msecs_to_jiffies(20);
- done = &c->dma_done.done;
- while (time_before(jiffies, timeout))
- if (*done)
- break;
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_src, count, DMA_TO_DEVICE);
- if (!*done) {
+ if (ret) {
dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
goto out_copy;
}
@@ -466,7 +461,7 @@ static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
- int bram_offset;
+ int bram_offset, ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
/* DMA is not used. Revisit PM requirements before enabling it. */
@@ -488,20 +483,13 @@ static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S32,
- count / 4, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
- wait_for_completion(&c->dma_done);
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_dst, count, DMA_FROM_DEVICE);
- return 0;
+ if (ret)
+ dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
+
+ return ret;
}
static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
@@ -511,7 +499,7 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
struct onenand_chip *this = mtd->priv;
dma_addr_t dma_src, dma_dst;
- int bram_offset;
+ int bram_offset, ret;
bram_offset = omap2_onenand_bufferram_offset(mtd, area) + area + offset;
/* DMA is not used. Revisit PM requirements before enabling it. */
@@ -533,20 +521,13 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
return -1;
}
- omap_set_dma_transfer_params(c->dma_channel, OMAP_DMA_DATA_TYPE_S16,
- count / 2, 1, 0, 0, 0);
- omap_set_dma_src_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_src, 0, 0);
- omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC,
- dma_dst, 0, 0);
-
- reinit_completion(&c->dma_done);
- omap_start_dma(c->dma_channel);
- wait_for_completion(&c->dma_done);
-
+ ret = omap2_onenand_dma_transfer(c, dma_src, dma_dst, count);
dma_unmap_single(&c->pdev->dev, dma_src, count, DMA_TO_DEVICE);
- return 0;
+ if (ret)
+ dev_err(&c->pdev->dev, "timeout waiting for DMA\n");
+
+ return ret;
}
#else
--
2.11.0
next prev parent reply other threads:[~2017-11-11 21:21 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-11 21:12 [PATCH v4 00/16] OMAP2+ OneNAND driver update Ladislav Michl
2017-11-11 21:12 ` Ladislav Michl
2017-11-11 21:17 ` [PATCH v4 02/16] ARM: dts: OMAP2+: Add compatible property to onenand node Ladislav Michl
2017-11-11 21:17 ` Ladislav Michl
2017-11-14 15:11 ` Roger Quadros
2017-11-14 15:11 ` Roger Quadros
2017-11-14 23:01 ` Ladislav Michl
2017-11-14 23:01 ` Ladislav Michl
2017-11-14 21:39 ` Tony Lindgren
2017-11-14 21:39 ` Tony Lindgren
2017-11-11 21:18 ` [PATCH v4 03/16] ARM: dts: omap3-igep: Update onenand node timings Ladislav Michl
2017-11-11 21:18 ` Ladislav Michl
2017-11-14 15:12 ` Roger Quadros
2017-11-14 15:12 ` Roger Quadros
2017-11-14 21:39 ` Tony Lindgren
2017-11-14 21:39 ` Tony Lindgren
2017-11-11 21:19 ` [PATCH v4 04/16] mtd: onenand: omap2: Remove regulator support Ladislav Michl
2017-11-11 21:19 ` Ladislav Michl
2017-11-14 15:13 ` Roger Quadros
2017-11-14 15:13 ` Roger Quadros
2017-11-15 14:15 ` Sebastian Reichel
2017-11-15 14:15 ` Sebastian Reichel
2017-11-11 21:19 ` [PATCH v4 05/16] mtd: onenand: omap2: Remove skip initial unlocking support Ladislav Michl
2017-11-11 21:19 ` Ladislav Michl
2017-11-14 15:14 ` Roger Quadros
2017-11-14 15:14 ` Roger Quadros
2017-11-15 14:16 ` Sebastian Reichel
2017-11-15 14:16 ` Sebastian Reichel
2017-11-11 21:20 ` [PATCH v4 06/16] mtd: onenand: omap2: Remove partitioning support from platform data Ladislav Michl
2017-11-11 21:20 ` Ladislav Michl
2017-11-14 15:14 ` Roger Quadros
2017-11-14 15:14 ` Roger Quadros
2017-11-15 14:57 ` Sebastian Reichel
2017-11-15 14:57 ` Sebastian Reichel
2017-11-11 21:20 ` [PATCH v4 07/16] mtd: onenand: omap2: Account waiting time as waiting on IO Ladislav Michl
2017-11-11 21:20 ` Ladislav Michl
2017-11-14 15:18 ` Roger Quadros
2017-11-14 15:18 ` Roger Quadros
2017-11-15 15:00 ` Sebastian Reichel
2017-11-15 15:00 ` Sebastian Reichel
2017-11-11 21:21 ` Ladislav Michl [this message]
2017-11-11 21:21 ` [PATCH v4 08/16] mtd: onenand: omap2: Simplify the DMA setup for various paths Ladislav Michl
2017-11-15 8:35 ` Roger Quadros
2017-11-15 8:35 ` Roger Quadros
2017-11-15 15:05 ` Sebastian Reichel
2017-11-15 15:05 ` Sebastian Reichel
2017-11-11 21:22 ` [PATCH v4 09/16] mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA implementation Ladislav Michl
2017-11-11 21:22 ` Ladislav Michl
2017-11-15 8:38 ` Roger Quadros
2017-11-15 8:38 ` Roger Quadros
2017-11-15 15:07 ` Sebastian Reichel
2017-11-15 15:07 ` Sebastian Reichel
2017-11-11 21:23 ` [PATCH v4 10/16] mtd: onenand: omap2: Convert to use dmaengine for memcpy Ladislav Michl
2017-11-11 21:23 ` Ladislav Michl
2017-11-15 8:57 ` Roger Quadros
2017-11-15 8:57 ` Roger Quadros
2017-11-15 9:32 ` Ladislav Michl
2017-11-15 9:32 ` Ladislav Michl
2017-11-15 15:19 ` Sebastian Reichel
2017-11-15 15:19 ` Sebastian Reichel
2017-11-11 21:24 ` [PATCH v4 11/16] mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific Ladislav Michl
2017-11-11 21:24 ` Ladislav Michl
2017-11-15 9:31 ` Roger Quadros
2017-11-15 9:31 ` Roger Quadros
2017-11-15 15:20 ` Sebastian Reichel
2017-11-15 15:20 ` Sebastian Reichel
2017-11-11 21:24 ` [PATCH v4 12/16] mtd: onenand: omap2: Enable DMA by default Ladislav Michl
2017-11-11 21:24 ` Ladislav Michl
2017-11-15 10:08 ` Roger Quadros
2017-11-15 10:08 ` Roger Quadros
2017-11-15 10:32 ` Ladislav Michl
2017-11-15 10:32 ` Ladislav Michl
2017-11-15 10:43 ` Roger Quadros
2017-11-15 10:43 ` Roger Quadros
2017-11-27 18:21 ` Ladislav Michl
2017-11-27 18:21 ` Ladislav Michl
2017-11-15 10:44 ` Roger Quadros
2017-11-15 10:44 ` Roger Quadros
2017-11-11 21:26 ` [PATCH v4 13/16] memory: omap-gpmc: Refactor OneNAND support Ladislav Michl
2017-11-11 21:26 ` Ladislav Michl
2017-11-15 10:13 ` Roger Quadros
2017-11-15 10:13 ` Roger Quadros
2017-11-15 10:37 ` Ladislav Michl
2017-11-15 10:37 ` Ladislav Michl
2017-11-11 21:27 ` [PATCH v4 14/16] mtd: onenand: omap2: Configure driver from DT Ladislav Michl
2017-11-11 21:27 ` Ladislav Michl
2017-11-15 10:40 ` Roger Quadros
2017-11-15 10:40 ` Roger Quadros
2017-11-15 10:53 ` Ladislav Michl
2017-11-15 10:53 ` Ladislav Michl
2017-11-15 11:04 ` Roger Quadros
2017-11-15 11:04 ` Roger Quadros
2017-11-15 11:20 ` Ladislav Michl
2017-11-15 11:20 ` Ladislav Michl
2017-11-15 14:41 ` Roger Quadros
2017-11-15 14:41 ` Roger Quadros
2017-11-11 21:29 ` [PATCH v4 15/16] ARM: OMAP2+: Remove gpmc-onenand Ladislav Michl
2017-11-11 21:29 ` Ladislav Michl
2017-11-14 21:41 ` Tony Lindgren
2017-11-14 21:41 ` Tony Lindgren
2017-11-15 10:46 ` Roger Quadros
2017-11-15 10:46 ` Roger Quadros
2017-11-11 21:29 ` [PATCH v4 16/16] ARM: dts: Nokia: Use R/B pin Ladislav Michl
2017-11-11 21:29 ` Ladislav Michl
2017-11-14 21:42 ` Tony Lindgren
2017-11-14 21:42 ` Tony Lindgren
2017-11-14 22:46 ` Ladislav Michl
2017-11-14 22:46 ` Ladislav Michl
2017-11-14 21:48 ` [PATCH v4 00/16] OMAP2+ OneNAND driver update Tony Lindgren
2017-11-14 21:48 ` Tony Lindgren
2017-11-14 22:53 ` Ladislav Michl
2017-11-14 22:53 ` Ladislav Michl
2017-11-15 8:10 ` Peter Ujfalusi
2017-11-15 8:10 ` Peter Ujfalusi
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