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From: Matthias Kaehlcke <mka@chromium.org>
To: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, dianders@chromium.org,
	rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org,
	Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, smohanad@codeaurora.org,
	edubezval@gmail.com, David Brown <david.brown@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	vivek.gautam@codeaurora.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	andy.gross@linaro.org, bjorn.andersson@linaro.org,
	linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 3/7] arm64: dts: msm8996: thermal: Initialise via DT and add second controller
Date: Tue, 17 Jul 2018 16:42:13 -0700	[thread overview]
Message-ID: <20180717234213.GD129942@google.com> (raw)
In-Reply-To: <f6cb99e6b805b0850b039e4f5d469e761d84f6d0.1531384019.git.amit.kucheria@linaro.org>

On Thu, Jul 12, 2018 at 02:09:04PM +0530, Amit Kucheria wrote:
> We also split up the regmap address space into two, for the TM and SROT
> registers. This was required to deal with different address offsets for the
> TM and SROT registers across different SoC families.
> 
> 8996 has two TSENS IP blocks, initialise the second one too.
> 
> Since tsens-common.c/init_common() currently only registers one address
> space, the order is important (TM before SROT). This is OK since the code
> doesn't really use the SROT functionality yet.
> 
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 8c7f9ca..688e752 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -459,9 +459,19 @@
>  			status = "disabled";
>  		};
>  
> -		tsens0: thermal-sensor@4a8000 {
> +		tsens0: thermal-sensor@4a9000 {
                                       ~~~~~~

I suppose the address of the TM block is used here instead of the SROT
address (which is lower) since SROT functionality is currently not
used. Would/should this change if/when the driver uses SROT?

>  			compatible = "qcom,msm8996-tsens";
> -			reg = <0x4a8000 0x2000>;
> +			reg = <0x4a9000 0x1000>, /* TM */
> +			      <0x4a8000 0x1000>; /* SROT */
> +			#qcom,sensors = <13>;
> +			#thermal-sensor-cells = <1>;
> +		};
> +
> +		tsens1: thermal-sensor@4ad000 {
> +			compatible = "qcom,msm8996-tsens";
> +			reg = <0x4ad000 0x1000>, /* TM */
> +			      <0x4ac000 0x1000>; /* SROT */
> +			#qcom,sensors = <8>;
>  			#thermal-sensor-cells = <1>;
>  		};

WARNING: multiple messages have this Message-ID (diff)
From: Matthias Kaehlcke <mka@chromium.org>
To: Amit Kucheria <amit.kucheria@linaro.org>
Cc: linux-kernel@vger.kernel.org, rnayak@codeaurora.org,
	linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org,
	edubezval@gmail.com, smohanad@codeaurora.org,
	vivek.gautam@codeaurora.org, andy.gross@linaro.org,
	dianders@chromium.org, David Brown <david.brown@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	linux-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 3/7] arm64: dts: msm8996: thermal: Initialise via DT and add second controller
Date: Tue, 17 Jul 2018 16:42:13 -0700	[thread overview]
Message-ID: <20180717234213.GD129942@google.com> (raw)
In-Reply-To: <f6cb99e6b805b0850b039e4f5d469e761d84f6d0.1531384019.git.amit.kucheria@linaro.org>

On Thu, Jul 12, 2018 at 02:09:04PM +0530, Amit Kucheria wrote:
> We also split up the regmap address space into two, for the TM and SROT
> registers. This was required to deal with different address offsets for the
> TM and SROT registers across different SoC families.
> 
> 8996 has two TSENS IP blocks, initialise the second one too.
> 
> Since tsens-common.c/init_common() currently only registers one address
> space, the order is important (TM before SROT). This is OK since the code
> doesn't really use the SROT functionality yet.
> 
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 8c7f9ca..688e752 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -459,9 +459,19 @@
>  			status = "disabled";
>  		};
>  
> -		tsens0: thermal-sensor@4a8000 {
> +		tsens0: thermal-sensor@4a9000 {
                                       ~~~~~~

I suppose the address of the TM block is used here instead of the SROT
address (which is lower) since SROT functionality is currently not
used. Would/should this change if/when the driver uses SROT?

>  			compatible = "qcom,msm8996-tsens";
> -			reg = <0x4a8000 0x2000>;
> +			reg = <0x4a9000 0x1000>, /* TM */
> +			      <0x4a8000 0x1000>; /* SROT */
> +			#qcom,sensors = <13>;
> +			#thermal-sensor-cells = <1>;
> +		};
> +
> +		tsens1: thermal-sensor@4ad000 {
> +			compatible = "qcom,msm8996-tsens";
> +			reg = <0x4ad000 0x1000>, /* TM */
> +			      <0x4ac000 0x1000>; /* SROT */
> +			#qcom,sensors = <8>;
>  			#thermal-sensor-cells = <1>;
>  		};

WARNING: multiple messages have this Message-ID (diff)
From: mka@chromium.org (Matthias Kaehlcke)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 3/7] arm64: dts: msm8996: thermal: Initialise via DT and add second controller
Date: Tue, 17 Jul 2018 16:42:13 -0700	[thread overview]
Message-ID: <20180717234213.GD129942@google.com> (raw)
In-Reply-To: <f6cb99e6b805b0850b039e4f5d469e761d84f6d0.1531384019.git.amit.kucheria@linaro.org>

On Thu, Jul 12, 2018 at 02:09:04PM +0530, Amit Kucheria wrote:
> We also split up the regmap address space into two, for the TM and SROT
> registers. This was required to deal with different address offsets for the
> TM and SROT registers across different SoC families.
> 
> 8996 has two TSENS IP blocks, initialise the second one too.
> 
> Since tsens-common.c/init_common() currently only registers one address
> space, the order is important (TM before SROT). This is OK since the code
> doesn't really use the SROT functionality yet.
> 
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 8c7f9ca..688e752 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -459,9 +459,19 @@
>  			status = "disabled";
>  		};
>  
> -		tsens0: thermal-sensor at 4a8000 {
> +		tsens0: thermal-sensor at 4a9000 {
                                       ~~~~~~

I suppose the address of the TM block is used here instead of the SROT
address (which is lower) since SROT functionality is currently not
used. Would/should this change if/when the driver uses SROT?

>  			compatible = "qcom,msm8996-tsens";
> -			reg = <0x4a8000 0x2000>;
> +			reg = <0x4a9000 0x1000>, /* TM */
> +			      <0x4a8000 0x1000>; /* SROT */
> +			#qcom,sensors = <13>;
> +			#thermal-sensor-cells = <1>;
> +		};
> +
> +		tsens1: thermal-sensor at 4ad000 {
> +			compatible = "qcom,msm8996-tsens";
> +			reg = <0x4ad000 0x1000>, /* TM */
> +			      <0x4ac000 0x1000>; /* SROT */
> +			#qcom,sensors = <8>;
>  			#thermal-sensor-cells = <1>;
>  		};

  parent reply	other threads:[~2018-07-17 23:42 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-12  8:39 [PATCH v7 0/7] thermal: tsens: Refactoring for TSENSv2 IP Amit Kucheria
2018-07-12  8:39 ` Amit Kucheria
2018-07-12  8:39 ` [PATCH v7 1/7] thermal: tsens: Get rid of unused fields in structure Amit Kucheria
2018-07-12  8:39 ` [PATCH v7 2/7] thermal: tsens: Add support to split up register address space into two Amit Kucheria
2018-07-12 17:12   ` Doug Anderson
2018-07-17 23:29   ` Matthias Kaehlcke
2018-07-18  3:42     ` Amit Kucheria
2018-07-12  8:39 ` [PATCH v7 3/7] arm64: dts: msm8996: thermal: Initialise via DT and add second controller Amit Kucheria
2018-07-12  8:39   ` Amit Kucheria
2018-07-12 17:14   ` Doug Anderson
2018-07-12 17:14     ` Doug Anderson
2018-07-17 23:42   ` Matthias Kaehlcke [this message]
2018-07-17 23:42     ` Matthias Kaehlcke
2018-07-17 23:42     ` Matthias Kaehlcke
2018-07-17 23:55     ` Doug Anderson
2018-07-17 23:55       ` Doug Anderson
2018-07-17 23:58       ` Matthias Kaehlcke
2018-07-17 23:58         ` Matthias Kaehlcke
2018-07-12  8:39 ` [PATCH v7 4/7] thermal: tsens: Rename tsens-8996 to tsens-v2 for reuse Amit Kucheria
2018-07-12 17:19   ` Doug Anderson
2018-07-17 23:54   ` Matthias Kaehlcke
2018-07-12  8:39 ` [PATCH v7 5/7] dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP Amit Kucheria
2018-07-12 17:15   ` Doug Anderson
2018-07-18  0:09   ` Matthias Kaehlcke
2018-07-18  6:42     ` Amit Kucheria
2018-07-18  6:42       ` Amit Kucheria
2018-07-12  8:39 ` [PATCH v7 6/7] thermal: tsens: Add generic support for TSENS v2 IP Amit Kucheria
2018-07-12 17:16   ` Doug Anderson
2018-07-12  8:39 ` [PATCH v7 7/7] arm64: dts: sdm845: Add tsens nodes Amit Kucheria
2018-07-12  8:39   ` Amit Kucheria
2018-07-12 17:18   ` Doug Anderson
2018-07-12 17:18     ` Doug Anderson
2018-07-18  0:15   ` Matthias Kaehlcke
2018-07-18  0:15     ` Matthias Kaehlcke

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