All of lore.kernel.org
 help / color / mirror / Atom feed
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	linux-arm-kernel@lists.infradead.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-spi@vger.kernel.org
Subject: [PATCH v2 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe
Date: Fri,  8 Nov 2019 15:07:43 +0100	[thread overview]
Message-ID: <20191108140744.1734-7-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20191108140744.1734-1-miquel.raynal@bootlin.com>

Supporting more than one CS will need some tweaking of the linear
configuration register which is (rightfully) initialized in the
hardware initialization helper. The extra initialization needs the
knowledge of the actual number of CS, which is retrieved by reading
the value of the num-cs DT property.

As the initialization helper is called pretty early and might be
called much later in the probe without side effect, let's delay it a
bit so that the number of CS will be available when running this
helper. This way, adding support for multiple CS lines in a next patch
will be eased.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/spi/spi-zynq-qspi.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 9adfcc66b02b..07d361501aa0 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -658,9 +658,6 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 		goto clk_dis_pclk;
 	}
 
-	/* QSPI controller initializations */
-	zynq_qspi_init_hw(xqspi);
-
 	xqspi->irq = platform_get_irq(pdev, 0);
 	if (xqspi->irq <= 0) {
 		ret = -ENXIO;
@@ -691,6 +688,10 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	ctlr->setup = zynq_qspi_setup_op;
 	ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
 	ctlr->dev.of_node = np;
+
+	/* QSPI controller initializations */
+	zynq_qspi_init_hw(xqspi);
+
 	ret = devm_spi_register_controller(&pdev->dev, ctlr);
 	if (ret) {
 		dev_err(&pdev->dev, "spi_register_master failed\n");
-- 
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	linux-arm-kernel@lists.infradead.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-spi@vger.kernel.org
Subject: [PATCH v2 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe
Date: Fri,  8 Nov 2019 15:07:43 +0100	[thread overview]
Message-ID: <20191108140744.1734-7-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20191108140744.1734-1-miquel.raynal@bootlin.com>

Supporting more than one CS will need some tweaking of the linear
configuration register which is (rightfully) initialized in the
hardware initialization helper. The extra initialization needs the
knowledge of the actual number of CS, which is retrieved by reading
the value of the num-cs DT property.

As the initialization helper is called pretty early and might be
called much later in the probe without side effect, let's delay it a
bit so that the number of CS will be available when running this
helper. This way, adding support for multiple CS lines in a next patch
will be eased.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/spi/spi-zynq-qspi.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 9adfcc66b02b..07d361501aa0 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -658,9 +658,6 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 		goto clk_dis_pclk;
 	}
 
-	/* QSPI controller initializations */
-	zynq_qspi_init_hw(xqspi);
-
 	xqspi->irq = platform_get_irq(pdev, 0);
 	if (xqspi->irq <= 0) {
 		ret = -ENXIO;
@@ -691,6 +688,10 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	ctlr->setup = zynq_qspi_setup_op;
 	ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
 	ctlr->dev.of_node = np;
+
+	/* QSPI controller initializations */
+	zynq_qspi_init_hw(xqspi);
+
 	ret = devm_spi_register_controller(&pdev->dev, ctlr);
 	if (ret) {
 		dev_err(&pdev->dev, "spi_register_master failed\n");
-- 
2.20.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-11-08 14:07 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 14:07 [PATCH v2 0/7] spi: zynq-qspi: Clarify and fix the chip selection Miquel Raynal
2019-11-08 14:07 ` [PATCH v2 1/7] spi: zynq-qspi: Anything else than CS0 is not supported yet Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Anything else than CS0 is not supported yet" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown
2019-11-08 14:07 ` [PATCH v2 2/7] spi: zynq-qspi: Keep the naming consistent across the driver Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 14:07 ` [PATCH v2 3/7] spi: zynq-qspi: Keep the bitfields naming consistent Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Keep the bitfields naming consistent" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown
2019-11-08 14:07 ` [PATCH v2 4/7] spi: zynq-qspi: Enhance the Linear CFG bit definitions Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Enhance the Linear CFG bit definitions" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown
2019-11-08 14:07 ` [PATCH v2 5/7] spi: zynq-qspi: Clarify the select chip function Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Clarify the select chip function" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown
2019-11-08 14:07 ` Miquel Raynal [this message]
2019-11-08 14:07   ` [PATCH v2 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Do the actual hardware initialization later in the probe" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown
2019-11-08 14:07 ` [PATCH v2 7/7] spi: zynq-qspi: Support two chip selects Miquel Raynal
2019-11-08 14:07   ` Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Support two chip selects" to the spi tree Mark Brown
2019-11-08 17:45     ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191108140744.1734-7-miquel.raynal@bootlin.com \
    --to=miquel.raynal@bootlin.com \
    --cc=Tudor.Ambarus@microchip.com \
    --cc=broonie@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=michal.simek@xilinx.com \
    --cc=naga.sureshkumar.relli@xilinx.com \
    --cc=thomas.petazzoni@bootlin.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.