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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	<chao.hao@mediatek.com>, <ming-fan.chen@mediatek.com>
Subject: [PATCH v2 15/23] iommu/mediatek: Add iova reserved function
Date: Sat, 5 Sep 2020 16:09:12 +0800	[thread overview]
Message-ID: <20200905080920.13396-16-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200905080920.13396-1-yong.wu@mediatek.com>

For multiple iommu_domains, we need to reserve some iova regions. Take a
example, If the default iova region is 0 ~ 4G, but the 0x4000_0000 ~
0x43ff_ffff is only for the special CCU0 domain. Thus we should exclude
this region for the default iova region.

This patch adds iova reserved flow. It's a preparing patch for supporting
multi-domain.

Signed-off-by: Anan sun <anan.sun@mediatek.com>
Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 28 ++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  5 +++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index d22772ec64c8..5b63732044de 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -153,6 +153,11 @@ static LIST_HEAD(m4ulist);	/* List all the M4U HWs */
 
 #define for_each_m4u(data)	list_for_each_entry(data, &m4ulist, list)
 
+struct mtk_iommu_iova_region {
+	dma_addr_t		iova_base;
+	unsigned long long	size;
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
  * for the performance.
@@ -539,6 +544,27 @@ static int mtk_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, args->args, 1);
 }
 
+static void mtk_iommu_get_resv_regions(struct device *dev,
+				       struct list_head *head)
+{
+	struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
+	const struct mtk_iommu_iova_region *resv;
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_READ;
+	unsigned int i;
+
+	for (i = 0; i < data->plat_data->iova_region_nr; i++) {
+		resv = data->plat_data->iova_region + i;
+
+		region = iommu_alloc_resv_region(resv->iova_base, resv->size,
+						 prot, IOMMU_RESV_RESERVED);
+		if (!region)
+			return;
+
+		list_add_tail(&region->list, head);
+	}
+}
+
 static const struct iommu_ops mtk_iommu_ops = {
 	.domain_alloc	= mtk_iommu_domain_alloc,
 	.domain_free	= mtk_iommu_domain_free,
@@ -553,6 +579,8 @@ static const struct iommu_ops mtk_iommu_ops = {
 	.release_device	= mtk_iommu_release_device,
 	.device_group	= mtk_iommu_device_group,
 	.of_xlate	= mtk_iommu_of_xlate,
+	.get_resv_regions = mtk_iommu_get_resv_regions,
+	.put_resv_regions = generic_iommu_put_resv_regions,
 	.pgsize_bitmap	= SZ_4K | SZ_64K | SZ_1M | SZ_16M,
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index ae7909815cdb..d45c13c9d324 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -44,10 +44,15 @@ enum mtk_iommu_plat {
 	M4U_MT8183,
 };
 
+struct mtk_iommu_iova_region;
+
 struct mtk_iommu_plat_data {
 	enum mtk_iommu_plat m4u_plat;
 	u32                 flags;
 	u32                 inv_sel_reg;
+
+	unsigned int        iova_region_nr;
+	const struct mtk_iommu_iova_region   *iova_region;
 	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com,
	anan.sun@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 15/23] iommu/mediatek: Add iova reserved function
Date: Sat, 5 Sep 2020 16:09:12 +0800	[thread overview]
Message-ID: <20200905080920.13396-16-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200905080920.13396-1-yong.wu@mediatek.com>

For multiple iommu_domains, we need to reserve some iova regions. Take a
example, If the default iova region is 0 ~ 4G, but the 0x4000_0000 ~
0x43ff_ffff is only for the special CCU0 domain. Thus we should exclude
this region for the default iova region.

This patch adds iova reserved flow. It's a preparing patch for supporting
multi-domain.

Signed-off-by: Anan sun <anan.sun@mediatek.com>
Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 28 ++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  5 +++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index d22772ec64c8..5b63732044de 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -153,6 +153,11 @@ static LIST_HEAD(m4ulist);	/* List all the M4U HWs */
 
 #define for_each_m4u(data)	list_for_each_entry(data, &m4ulist, list)
 
+struct mtk_iommu_iova_region {
+	dma_addr_t		iova_base;
+	unsigned long long	size;
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
  * for the performance.
@@ -539,6 +544,27 @@ static int mtk_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, args->args, 1);
 }
 
+static void mtk_iommu_get_resv_regions(struct device *dev,
+				       struct list_head *head)
+{
+	struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
+	const struct mtk_iommu_iova_region *resv;
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_READ;
+	unsigned int i;
+
+	for (i = 0; i < data->plat_data->iova_region_nr; i++) {
+		resv = data->plat_data->iova_region + i;
+
+		region = iommu_alloc_resv_region(resv->iova_base, resv->size,
+						 prot, IOMMU_RESV_RESERVED);
+		if (!region)
+			return;
+
+		list_add_tail(&region->list, head);
+	}
+}
+
 static const struct iommu_ops mtk_iommu_ops = {
 	.domain_alloc	= mtk_iommu_domain_alloc,
 	.domain_free	= mtk_iommu_domain_free,
@@ -553,6 +579,8 @@ static const struct iommu_ops mtk_iommu_ops = {
 	.release_device	= mtk_iommu_release_device,
 	.device_group	= mtk_iommu_device_group,
 	.of_xlate	= mtk_iommu_of_xlate,
+	.get_resv_regions = mtk_iommu_get_resv_regions,
+	.put_resv_regions = generic_iommu_put_resv_regions,
 	.pgsize_bitmap	= SZ_4K | SZ_64K | SZ_1M | SZ_16M,
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index ae7909815cdb..d45c13c9d324 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -44,10 +44,15 @@ enum mtk_iommu_plat {
 	M4U_MT8183,
 };
 
+struct mtk_iommu_iova_region;
+
 struct mtk_iommu_plat_data {
 	enum mtk_iommu_plat m4u_plat;
 	u32                 flags;
 	u32                 inv_sel_reg;
+
+	unsigned int        iova_region_nr;
+	const struct mtk_iommu_iova_region   *iova_region;
 	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, yong.wu@mediatek.com,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 15/23] iommu/mediatek: Add iova reserved function
Date: Sat, 5 Sep 2020 16:09:12 +0800	[thread overview]
Message-ID: <20200905080920.13396-16-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200905080920.13396-1-yong.wu@mediatek.com>

For multiple iommu_domains, we need to reserve some iova regions. Take a
example, If the default iova region is 0 ~ 4G, but the 0x4000_0000 ~
0x43ff_ffff is only for the special CCU0 domain. Thus we should exclude
this region for the default iova region.

This patch adds iova reserved flow. It's a preparing patch for supporting
multi-domain.

Signed-off-by: Anan sun <anan.sun@mediatek.com>
Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 28 ++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  5 +++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index d22772ec64c8..5b63732044de 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -153,6 +153,11 @@ static LIST_HEAD(m4ulist);	/* List all the M4U HWs */
 
 #define for_each_m4u(data)	list_for_each_entry(data, &m4ulist, list)
 
+struct mtk_iommu_iova_region {
+	dma_addr_t		iova_base;
+	unsigned long long	size;
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
  * for the performance.
@@ -539,6 +544,27 @@ static int mtk_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, args->args, 1);
 }
 
+static void mtk_iommu_get_resv_regions(struct device *dev,
+				       struct list_head *head)
+{
+	struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
+	const struct mtk_iommu_iova_region *resv;
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_READ;
+	unsigned int i;
+
+	for (i = 0; i < data->plat_data->iova_region_nr; i++) {
+		resv = data->plat_data->iova_region + i;
+
+		region = iommu_alloc_resv_region(resv->iova_base, resv->size,
+						 prot, IOMMU_RESV_RESERVED);
+		if (!region)
+			return;
+
+		list_add_tail(&region->list, head);
+	}
+}
+
 static const struct iommu_ops mtk_iommu_ops = {
 	.domain_alloc	= mtk_iommu_domain_alloc,
 	.domain_free	= mtk_iommu_domain_free,
@@ -553,6 +579,8 @@ static const struct iommu_ops mtk_iommu_ops = {
 	.release_device	= mtk_iommu_release_device,
 	.device_group	= mtk_iommu_device_group,
 	.of_xlate	= mtk_iommu_of_xlate,
+	.get_resv_regions = mtk_iommu_get_resv_regions,
+	.put_resv_regions = generic_iommu_put_resv_regions,
 	.pgsize_bitmap	= SZ_4K | SZ_64K | SZ_1M | SZ_16M,
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index ae7909815cdb..d45c13c9d324 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -44,10 +44,15 @@ enum mtk_iommu_plat {
 	M4U_MT8183,
 };
 
+struct mtk_iommu_iova_region;
+
 struct mtk_iommu_plat_data {
 	enum mtk_iommu_plat m4u_plat;
 	u32                 flags;
 	u32                 inv_sel_reg;
+
+	unsigned int        iova_region_nr;
+	const struct mtk_iommu_iova_region   *iova_region;
 	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org, yong.wu@mediatek.com,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 15/23] iommu/mediatek: Add iova reserved function
Date: Sat, 5 Sep 2020 16:09:12 +0800	[thread overview]
Message-ID: <20200905080920.13396-16-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200905080920.13396-1-yong.wu@mediatek.com>

For multiple iommu_domains, we need to reserve some iova regions. Take a
example, If the default iova region is 0 ~ 4G, but the 0x4000_0000 ~
0x43ff_ffff is only for the special CCU0 domain. Thus we should exclude
this region for the default iova region.

This patch adds iova reserved flow. It's a preparing patch for supporting
multi-domain.

Signed-off-by: Anan sun <anan.sun@mediatek.com>
Signed-off-by: Chao Hao <chao.hao@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 28 ++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  5 +++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index d22772ec64c8..5b63732044de 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -153,6 +153,11 @@ static LIST_HEAD(m4ulist);	/* List all the M4U HWs */
 
 #define for_each_m4u(data)	list_for_each_entry(data, &m4ulist, list)
 
+struct mtk_iommu_iova_region {
+	dma_addr_t		iova_base;
+	unsigned long long	size;
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
  * for the performance.
@@ -539,6 +544,27 @@ static int mtk_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	return iommu_fwspec_add_ids(dev, args->args, 1);
 }
 
+static void mtk_iommu_get_resv_regions(struct device *dev,
+				       struct list_head *head)
+{
+	struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
+	const struct mtk_iommu_iova_region *resv;
+	struct iommu_resv_region *region;
+	int prot = IOMMU_WRITE | IOMMU_READ;
+	unsigned int i;
+
+	for (i = 0; i < data->plat_data->iova_region_nr; i++) {
+		resv = data->plat_data->iova_region + i;
+
+		region = iommu_alloc_resv_region(resv->iova_base, resv->size,
+						 prot, IOMMU_RESV_RESERVED);
+		if (!region)
+			return;
+
+		list_add_tail(&region->list, head);
+	}
+}
+
 static const struct iommu_ops mtk_iommu_ops = {
 	.domain_alloc	= mtk_iommu_domain_alloc,
 	.domain_free	= mtk_iommu_domain_free,
@@ -553,6 +579,8 @@ static const struct iommu_ops mtk_iommu_ops = {
 	.release_device	= mtk_iommu_release_device,
 	.device_group	= mtk_iommu_device_group,
 	.of_xlate	= mtk_iommu_of_xlate,
+	.get_resv_regions = mtk_iommu_get_resv_regions,
+	.put_resv_regions = generic_iommu_put_resv_regions,
 	.pgsize_bitmap	= SZ_4K | SZ_64K | SZ_1M | SZ_16M,
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index ae7909815cdb..d45c13c9d324 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -44,10 +44,15 @@ enum mtk_iommu_plat {
 	M4U_MT8183,
 };
 
+struct mtk_iommu_iova_region;
+
 struct mtk_iommu_plat_data {
 	enum mtk_iommu_plat m4u_plat;
 	u32                 flags;
 	u32                 inv_sel_reg;
+
+	unsigned int        iova_region_nr;
+	const struct mtk_iommu_iova_region   *iova_region;
 	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-09-05  8:13 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-05  8:08 [PATCH v2 00/23] MT8192 IOMMU support Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` [PATCH v2 01/23] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-14 23:22   ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-15  5:49     ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-18 16:07       ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-05  8:08 ` [PATCH v2 02/23] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-14 23:23   ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-15  5:55     ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 03/23] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 04/23] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 05/23] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-15  0:42   ` Rob Herring
2020-09-15  0:42     ` Rob Herring
2020-09-15  0:42     ` Rob Herring
2020-09-15  0:42     ` Rob Herring
2020-09-05  8:09 ` [PATCH v2 07/23] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 08/23] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 09/23] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 10/23] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 11/23] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 12/23] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 13/23] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 14/23] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` Yong Wu [this message]
2020-09-05  8:09   ` [PATCH v2 15/23] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 16/23] iommu/mediatek: Add single domain Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 17/23] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 18/23] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 19/23] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 20/23] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 21/23] iommu/mediatek: Adjust the structure Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 22/23] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 23/23] memory: mtk-smi: " Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu

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