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From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	iommu@lists.linux-foundation.org, Tomasz Figa <tfiga@google.com>,
	srv_heupstream@mediatek.com, devicetree@vger.kernel.org,
	Robin Murphy <robin.murphy@arm.com>,
	Evan Green <evgreen@chromium.org>,
	Rob Herring <robh+dt@kernel.org>, Joerg Roedel <joro@8bytes.org>,
	chao.hao@mediatek.com, Nicolas Boichat <drinkcat@chromium.org>,
	linux-kernel@vger.kernel.org, anan.sun@mediatek.com,
	ming-fan.chen@mediatek.com, youlin.pei@mediatek.com
Subject: Re: [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 14 Sep 2020 18:42:45 -0600	[thread overview]
Message-ID: <20200915004245.GA591931@bogus> (raw)
In-Reply-To: <20200905080920.13396-7-yong.wu@mediatek.com>

On Sat, 05 Sep 2020 16:09:03 +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: anan.sun@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	youlin.pei@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 14 Sep 2020 18:42:45 -0600	[thread overview]
Message-ID: <20200915004245.GA591931@bogus> (raw)
In-Reply-To: <20200905080920.13396-7-yong.wu@mediatek.com>

On Sat, 05 Sep 2020 16:09:03 +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: anan.sun@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	youlin.pei@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 14 Sep 2020 18:42:45 -0600	[thread overview]
Message-ID: <20200915004245.GA591931@bogus> (raw)
In-Reply-To: <20200905080920.13396-7-yong.wu@mediatek.com>

On Sat, 05 Sep 2020 16:09:03 +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: anan.sun@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	youlin.pei@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 14 Sep 2020 18:42:45 -0600	[thread overview]
Message-ID: <20200915004245.GA591931@bogus> (raw)
In-Reply-To: <20200905080920.13396-7-yong.wu@mediatek.com>

On Sat, 05 Sep 2020 16:09:03 +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-09-15  0:43 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-05  8:08 [PATCH v2 00/23] MT8192 IOMMU support Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` Yong Wu
2020-09-05  8:08 ` [PATCH v2 01/23] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-14 23:22   ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-14 23:22     ` Rob Herring
2020-09-15  5:49     ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-15  5:49       ` Yong Wu
2020-09-18 16:07       ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-18 16:07         ` Rob Herring
2020-09-05  8:08 ` [PATCH v2 02/23] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-05  8:08   ` Yong Wu
2020-09-14 23:23   ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-14 23:23     ` Rob Herring
2020-09-15  5:55     ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-15  5:55       ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 03/23] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 04/23] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 05/23] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-15  0:42   ` Rob Herring [this message]
2020-09-15  0:42     ` Rob Herring
2020-09-15  0:42     ` Rob Herring
2020-09-15  0:42     ` Rob Herring
2020-09-05  8:09 ` [PATCH v2 07/23] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 08/23] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 09/23] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 10/23] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 11/23] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 12/23] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 13/23] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 14/23] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 15/23] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 16/23] iommu/mediatek: Add single domain Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 17/23] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 18/23] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 19/23] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 20/23] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 21/23] iommu/mediatek: Adjust the structure Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 22/23] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09 ` [PATCH v2 23/23] memory: mtk-smi: " Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu
2020-09-05  8:09   ` Yong Wu

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