From: Maxime Ripard <maxime@cerno.tech>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
linux-sunxi@googlegroups.com,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Yong Deng <yong.deng@magewell.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
Helen Koike <helen.koike@collabora.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Hans Verkuil <hans.verkuil@cisco.com>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Hans Verkuil <hverkuil@xs4all.nl>,
kevin.lhopital@hotmail.com
Subject: Re: [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller
Date: Mon, 26 Oct 2020 18:00:41 +0100 [thread overview]
Message-ID: <20201026170041.qsjzxlurufuuhcsq@gilmour.lan> (raw)
In-Reply-To: <20201023174546.504028-13-paul.kocialkowski@bootlin.com>
[-- Attachment #1: Type: text/plain, Size: 1400 bytes --]
On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> The A83T supports MIPI CSI-2 with a composite controller, covering both the
> protocol logic and the D-PHY implementation. This controller seems to be found
> on the A83T only and probably was abandonned since.
>
> This implementation splits the protocol and D-PHY registers and uses the PHY
> framework internally. The D-PHY is not registered as a standalone PHY driver
> since it cannot be used with any other controller.
>
> There are a few notable points about the controller:
> - The initialisation sequence involes writing specific magic init values that
> do not seem to make any particular sense given the concerned register fields.
> - Interrupts appear to be hitting regardless of the interrupt mask registers,
> which can cause a serious flood when transmission errors occur.
Ah, so it's a separate driver too.
> This work is based on the first version of the driver submitted by
> Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> instead of merging it in the sun6i-csi driver.
>
> It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> configuration.
Co-developped-by and SoB from Kevin?
Looking at the driver, the same comments from the v3s apply there
Maxime
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime@cerno.tech>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Helen Koike <helen.koike@collabora.com>,
linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Hans Verkuil <hverkuil@xs4all.nl>,
linux-sunxi@googlegroups.com, Rob Herring <robh+dt@kernel.org>,
Vinod Koul <vkoul@kernel.org>, Yong Deng <yong.deng@magewell.com>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Hans Verkuil <hans.verkuil@cisco.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
kevin.lhopital@hotmail.com, linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
Subject: Re: [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller
Date: Mon, 26 Oct 2020 18:00:41 +0100 [thread overview]
Message-ID: <20201026170041.qsjzxlurufuuhcsq@gilmour.lan> (raw)
In-Reply-To: <20201023174546.504028-13-paul.kocialkowski@bootlin.com>
[-- Attachment #1.1: Type: text/plain, Size: 1400 bytes --]
On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> The A83T supports MIPI CSI-2 with a composite controller, covering both the
> protocol logic and the D-PHY implementation. This controller seems to be found
> on the A83T only and probably was abandonned since.
>
> This implementation splits the protocol and D-PHY registers and uses the PHY
> framework internally. The D-PHY is not registered as a standalone PHY driver
> since it cannot be used with any other controller.
>
> There are a few notable points about the controller:
> - The initialisation sequence involes writing specific magic init values that
> do not seem to make any particular sense given the concerned register fields.
> - Interrupts appear to be hitting regardless of the interrupt mask registers,
> which can cause a serious flood when transmission errors occur.
Ah, so it's a separate driver too.
> This work is based on the first version of the driver submitted by
> Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> instead of merging it in the sun6i-csi driver.
>
> It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> configuration.
Co-developped-by and SoB from Kevin?
Looking at the driver, the same comments from the v3s apply there
Maxime
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[-- Attachment #2: Type: text/plain, Size: 169 bytes --]
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime@cerno.tech>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Helen Koike <helen.koike@collabora.com>,
linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Hans Verkuil <hverkuil@xs4all.nl>,
linux-sunxi@googlegroups.com, Rob Herring <robh+dt@kernel.org>,
Vinod Koul <vkoul@kernel.org>, Yong Deng <yong.deng@magewell.com>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Hans Verkuil <hans.verkuil@cisco.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
kevin.lhopital@hotmail.com, linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
Subject: Re: [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller
Date: Mon, 26 Oct 2020 18:00:41 +0100 [thread overview]
Message-ID: <20201026170041.qsjzxlurufuuhcsq@gilmour.lan> (raw)
In-Reply-To: <20201023174546.504028-13-paul.kocialkowski@bootlin.com>
[-- Attachment #1.1: Type: text/plain, Size: 1400 bytes --]
On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> The A83T supports MIPI CSI-2 with a composite controller, covering both the
> protocol logic and the D-PHY implementation. This controller seems to be found
> on the A83T only and probably was abandonned since.
>
> This implementation splits the protocol and D-PHY registers and uses the PHY
> framework internally. The D-PHY is not registered as a standalone PHY driver
> since it cannot be used with any other controller.
>
> There are a few notable points about the controller:
> - The initialisation sequence involes writing specific magic init values that
> do not seem to make any particular sense given the concerned register fields.
> - Interrupts appear to be hitting regardless of the interrupt mask registers,
> which can cause a serious flood when transmission errors occur.
Ah, so it's a separate driver too.
> This work is based on the first version of the driver submitted by
> Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> instead of merging it in the sun6i-csi driver.
>
> It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> configuration.
Co-developped-by and SoB from Kevin?
Looking at the driver, the same comments from the v3s apply there
Maxime
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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next prev parent reply other threads:[~2020-10-26 17:00 UTC|newest]
Thread overview: 198+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 17:45 [PATCH 00/14] Allwinner MIPI CSI-2 support for A31/V3s/A83T Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 01/14] phy: Distinguish between Rx and Tx for MIPI D-PHY with submodes Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 18:18 ` [linux-sunxi] " Jernej Škrabec
2020-10-23 18:18 ` Jernej Škrabec
2020-10-23 18:18 ` Jernej Škrabec
2020-10-24 8:31 ` Paul Kocialkowski
2020-10-24 8:31 ` Paul Kocialkowski
2020-10-24 8:31 ` Paul Kocialkowski
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-10-23 17:45 ` [PATCH 02/14] phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 15:38 ` Maxime Ripard
2020-10-26 15:38 ` Maxime Ripard
2020-10-26 15:38 ` Maxime Ripard
2020-10-27 9:23 ` Paul Kocialkowski
2020-10-27 9:23 ` Paul Kocialkowski
2020-10-27 9:23 ` Paul Kocialkowski
2020-10-27 18:28 ` Maxime Ripard
2020-10-27 18:28 ` Maxime Ripard
2020-10-27 18:28 ` Maxime Ripard
2020-11-04 10:53 ` Paul Kocialkowski
2020-11-04 10:53 ` Paul Kocialkowski
2020-11-04 10:53 ` Paul Kocialkowski
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-11-04 10:54 ` Paul Kocialkowski
2020-11-04 10:54 ` Paul Kocialkowski
2020-11-04 10:54 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 03/14] media: sun6i-csi: Support an optional dedicated memory pool Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 15:41 ` Maxime Ripard
2020-10-26 15:41 ` Maxime Ripard
2020-10-26 15:41 ` Maxime Ripard
2020-10-27 9:26 ` Paul Kocialkowski
2020-10-27 9:26 ` Paul Kocialkowski
2020-10-27 9:26 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 04/14] media: sun6i-csi: Fix the image storage bpp for 10/12-bit Bayer formats Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-30 22:45 ` Helen Koike
2020-10-30 22:45 ` Helen Koike
2020-10-30 22:45 ` Helen Koike
2020-11-04 10:56 ` Paul Kocialkowski
2020-11-04 10:56 ` Paul Kocialkowski
2020-11-04 10:56 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 05/14] media: sun6i-csi: Only configure the interface data width for parallel Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 16:00 ` Maxime Ripard
2020-10-26 16:00 ` Maxime Ripard
2020-10-26 16:00 ` Maxime Ripard
2020-10-27 9:31 ` Paul Kocialkowski
2020-10-27 9:31 ` Paul Kocialkowski
2020-10-27 9:31 ` Paul Kocialkowski
2020-10-27 18:31 ` Maxime Ripard
2020-10-27 18:31 ` Maxime Ripard
2020-10-27 18:31 ` Maxime Ripard
2020-10-23 17:45 ` [PATCH 06/14] media: sun6i-csi: Support feeding from the MIPI CSI-2 controller Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 07/14] dt-bindings: media: i2c: Add A31 MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 16:14 ` Maxime Ripard
2020-10-26 16:14 ` Maxime Ripard
2020-10-26 16:14 ` Maxime Ripard
2020-10-27 9:52 ` Paul Kocialkowski
2020-10-27 9:52 ` Paul Kocialkowski
2020-10-27 9:52 ` Paul Kocialkowski
2020-10-27 18:44 ` Maxime Ripard
2020-10-27 18:44 ` Maxime Ripard
2020-10-27 18:44 ` Maxime Ripard
2020-11-04 10:48 ` Paul Kocialkowski
2020-11-04 10:48 ` Paul Kocialkowski
2020-11-04 10:48 ` Paul Kocialkowski
2020-11-04 16:53 ` Maxime Ripard
2020-11-04 16:53 ` Maxime Ripard
2020-11-04 16:53 ` Maxime Ripard
2020-10-30 16:33 ` Rob Herring
2020-10-30 16:33 ` Rob Herring
2020-10-30 16:33 ` Rob Herring
2020-10-30 16:56 ` Sakari Ailus
2020-10-30 16:56 ` Sakari Ailus
2020-10-30 16:56 ` Sakari Ailus
2020-10-23 17:45 ` [PATCH 08/14] media: sunxi: Add support for the A31 MIPI CSI-2 controller Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 8:39 ` Dan Carpenter
2020-10-26 8:39 ` Dan Carpenter
2020-10-26 8:39 ` Dan Carpenter
2020-10-26 16:54 ` Maxime Ripard
2020-10-26 16:54 ` Maxime Ripard
2020-10-26 16:54 ` Maxime Ripard
2020-11-04 11:34 ` Paul Kocialkowski
2020-11-04 11:34 ` Paul Kocialkowski
2020-11-04 11:34 ` Paul Kocialkowski
2020-11-04 18:56 ` Maxime Ripard
2020-11-04 18:56 ` Maxime Ripard
2020-11-04 18:56 ` Maxime Ripard
2020-11-05 14:52 ` Paul Kocialkowski
2020-11-05 14:52 ` Paul Kocialkowski
2020-11-05 14:52 ` Paul Kocialkowski
2020-10-30 22:45 ` Helen Koike
2020-10-30 22:45 ` Helen Koike
2020-10-30 22:45 ` Helen Koike
2020-11-02 9:21 ` Maxime Ripard
2020-11-02 9:21 ` Maxime Ripard
2020-11-02 9:21 ` Maxime Ripard
2020-11-04 11:17 ` Paul Kocialkowski
2020-11-04 11:17 ` Paul Kocialkowski
2020-11-04 11:17 ` Paul Kocialkowski
2020-11-04 16:38 ` Helen Koike
2020-11-04 16:38 ` Helen Koike
2020-11-04 16:38 ` Helen Koike
2020-11-04 18:45 ` Maxime Ripard
2020-11-04 18:45 ` Maxime Ripard
2020-11-04 18:45 ` Maxime Ripard
2020-11-05 14:14 ` Helen Koike
2020-11-05 14:14 ` Helen Koike
2020-11-05 14:14 ` Helen Koike
2020-11-05 8:45 ` Sakari Ailus
2020-11-05 8:45 ` Sakari Ailus
2020-11-05 8:45 ` Sakari Ailus
2020-11-05 14:55 ` Paul Kocialkowski
2020-11-05 14:55 ` Paul Kocialkowski
2020-11-05 14:55 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 09/14] ARM: dts: sun8i: v3s: Add CSI0 camera interface node Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 10/14] ARM: dts: sun8i: v3s: Add MIPI D-PHY and MIPI CSI-2 interface nodes Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 16:55 ` Maxime Ripard
2020-10-26 16:55 ` Maxime Ripard
2020-10-26 16:55 ` Maxime Ripard
2020-10-23 17:45 ` [PATCH 11/14] dt-bindings: media: i2c: Add A83T MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 16:56 ` Maxime Ripard
2020-10-26 16:56 ` Maxime Ripard
2020-10-26 16:56 ` Maxime Ripard
2020-11-04 10:33 ` Paul Kocialkowski
2020-11-04 10:33 ` Paul Kocialkowski
2020-11-04 10:33 ` Paul Kocialkowski
2020-11-05 8:48 ` Sakari Ailus
2020-11-05 8:48 ` Sakari Ailus
2020-11-05 8:48 ` Sakari Ailus
2020-10-23 17:45 ` [PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 8:53 ` Dan Carpenter
2020-10-26 8:53 ` Dan Carpenter
2020-10-26 8:53 ` Dan Carpenter
2020-10-26 17:00 ` Maxime Ripard [this message]
2020-10-26 17:00 ` Maxime Ripard
2020-10-26 17:00 ` Maxime Ripard
2020-11-04 10:37 ` Paul Kocialkowski
2020-11-04 10:37 ` Paul Kocialkowski
2020-11-04 10:37 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 13/14] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` [PATCH 14/14] media: sunxi: sun8i-a83t-mipi-csi2: Avoid using the (unsolicited) interrupt Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-23 17:45 ` Paul Kocialkowski
2020-10-26 16:57 ` Maxime Ripard
2020-10-26 16:57 ` Maxime Ripard
2020-10-26 16:57 ` Maxime Ripard
2020-10-26 17:20 ` [PATCH 00/14] Allwinner MIPI CSI-2 support for A31/V3s/A83T Maxime Ripard
2020-10-26 17:20 ` Maxime Ripard
2020-10-26 17:20 ` Maxime Ripard
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-10-30 22:44 ` Helen Koike
2020-11-02 9:17 ` Maxime Ripard
2020-11-02 9:17 ` Maxime Ripard
2020-11-02 9:17 ` Maxime Ripard
2020-11-04 11:11 ` Paul Kocialkowski
2020-11-04 11:11 ` Paul Kocialkowski
2020-11-04 11:11 ` Paul Kocialkowski
2020-11-04 11:14 ` Paul Kocialkowski
2020-11-04 11:14 ` Paul Kocialkowski
2020-11-04 11:14 ` Paul Kocialkowski
2020-11-04 16:36 ` Helen Koike
2020-11-04 16:36 ` Helen Koike
2020-11-04 16:36 ` Helen Koike
2020-11-05 14:58 ` Paul Kocialkowski
2020-11-05 14:58 ` Paul Kocialkowski
2020-11-05 14:58 ` Paul Kocialkowski
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