From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 08/26] coresight: tpiu: Prepare for using coresight device access abstraction Date: Tue, 3 Nov 2020 11:03:58 -0700 [thread overview] Message-ID: <20201103180358.GC2855763@xps15> (raw) In-Reply-To: <20201028220945.3826358-10-suzuki.poulose@arm.com> On Wed, Oct 28, 2020 at 10:09:27PM +0000, Suzuki K Poulose wrote: > Prepare the TPIU driver to make use of the CoreSight device access > abstraction layer. The driver touches the device even before the > coresight device is registered. Thus we could be accessing the > devices without a csdev. As we are about to use the abstraction > layer for accessing the device, pass in the access directly > to avoid having to deal with the un-initialised csdev. > > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > drivers/hwtracing/coresight/coresight-tpiu.c | 30 +++++++++----------- > 1 file changed, 13 insertions(+), 17 deletions(-) Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> > > diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c > index dfa3b91d0281..98c4a029854c 100644 > --- a/drivers/hwtracing/coresight/coresight-tpiu.c > +++ b/drivers/hwtracing/coresight/coresight-tpiu.c > @@ -60,49 +60,45 @@ struct tpiu_drvdata { > struct coresight_device *csdev; > }; > > -static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) > +static void tpiu_enable_hw(struct csdev_access *csa) > { > - CS_UNLOCK(drvdata->base); > + CS_UNLOCK(csa->base); > > /* TODO: fill this up */ > > - CS_LOCK(drvdata->base); > + CS_LOCK(csa->base); > } > > static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) > { > - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > - > - tpiu_enable_hw(drvdata); > + tpiu_enable_hw(&csdev->access); > atomic_inc(csdev->refcnt); > dev_dbg(&csdev->dev, "TPIU enabled\n"); > return 0; > } > > -static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) > +static void tpiu_disable_hw(struct csdev_access *csa) > { > - CS_UNLOCK(drvdata->base); > + CS_UNLOCK(csa->base); > > /* Clear formatter and stop on flush */ > - writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR); > + csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); > /* Generate manual flush */ > - writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); > + csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); > /* Wait for flush to complete */ > - coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); > + coresight_timeout(csa->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); > /* Wait for formatter to stop */ > - coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); > + coresight_timeout(csa->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); > > - CS_LOCK(drvdata->base); > + CS_LOCK(csa->base); > } > > static int tpiu_disable(struct coresight_device *csdev) > { > - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > - > if (atomic_dec_return(csdev->refcnt)) > return -EBUSY; > > - tpiu_disable_hw(drvdata); > + tpiu_disable_hw(&csdev->access); > > dev_dbg(&csdev->dev, "TPIU disabled\n"); > return 0; > @@ -152,7 +148,7 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) > desc.access = CSDEV_ACCESS_IOMEM(base); > > /* Disable tpiu to support older devices */ > - tpiu_disable_hw(drvdata); > + tpiu_disable_hw(&desc.access); > > pdata = coresight_get_platform_data(dev); > if (IS_ERR(pdata)) > -- > 2.24.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Subject: Re: [PATCH v3 08/26] coresight: tpiu: Prepare for using coresight device access abstraction Date: Tue, 3 Nov 2020 11:03:58 -0700 [thread overview] Message-ID: <20201103180358.GC2855763@xps15> (raw) In-Reply-To: <20201028220945.3826358-10-suzuki.poulose@arm.com> On Wed, Oct 28, 2020 at 10:09:27PM +0000, Suzuki K Poulose wrote: > Prepare the TPIU driver to make use of the CoreSight device access > abstraction layer. The driver touches the device even before the > coresight device is registered. Thus we could be accessing the > devices without a csdev. As we are about to use the abstraction > layer for accessing the device, pass in the access directly > to avoid having to deal with the un-initialised csdev. > > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > drivers/hwtracing/coresight/coresight-tpiu.c | 30 +++++++++----------- > 1 file changed, 13 insertions(+), 17 deletions(-) Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> > > diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c > index dfa3b91d0281..98c4a029854c 100644 > --- a/drivers/hwtracing/coresight/coresight-tpiu.c > +++ b/drivers/hwtracing/coresight/coresight-tpiu.c > @@ -60,49 +60,45 @@ struct tpiu_drvdata { > struct coresight_device *csdev; > }; > > -static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) > +static void tpiu_enable_hw(struct csdev_access *csa) > { > - CS_UNLOCK(drvdata->base); > + CS_UNLOCK(csa->base); > > /* TODO: fill this up */ > > - CS_LOCK(drvdata->base); > + CS_LOCK(csa->base); > } > > static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) > { > - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > - > - tpiu_enable_hw(drvdata); > + tpiu_enable_hw(&csdev->access); > atomic_inc(csdev->refcnt); > dev_dbg(&csdev->dev, "TPIU enabled\n"); > return 0; > } > > -static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) > +static void tpiu_disable_hw(struct csdev_access *csa) > { > - CS_UNLOCK(drvdata->base); > + CS_UNLOCK(csa->base); > > /* Clear formatter and stop on flush */ > - writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR); > + csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); > /* Generate manual flush */ > - writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); > + csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); > /* Wait for flush to complete */ > - coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); > + coresight_timeout(csa->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); > /* Wait for formatter to stop */ > - coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); > + coresight_timeout(csa->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); > > - CS_LOCK(drvdata->base); > + CS_LOCK(csa->base); > } > > static int tpiu_disable(struct coresight_device *csdev) > { > - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > - > if (atomic_dec_return(csdev->refcnt)) > return -EBUSY; > > - tpiu_disable_hw(drvdata); > + tpiu_disable_hw(&csdev->access); > > dev_dbg(&csdev->dev, "TPIU disabled\n"); > return 0; > @@ -152,7 +148,7 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) > desc.access = CSDEV_ACCESS_IOMEM(base); > > /* Disable tpiu to support older devices */ > - tpiu_disable_hw(drvdata); > + tpiu_disable_hw(&desc.access); > > pdata = coresight_get_platform_data(dev); > if (IS_ERR(pdata)) > -- > 2.24.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-03 18:04 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-28 22:09 [PATCH v3 00/26] coresight: Support for ETM system instructions Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 01/26] coresight: etm4x: Fix accesses to TRCVMIDCTLR1 Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 02/26] coresight: etm4x: Fix accesses to TRCCIDCTLR1 Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 03/26] coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2 Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 04/26] coresight: etm4x: Fix accesses to TRCPROCSELR Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 05/26] coresight: etm4x: Handle TRCVIPCSSCTLR accesses Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 06/26] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-02 21:46 ` Mathieu Poirier 2020-11-02 21:46 ` Mathieu Poirier 2020-11-02 22:04 ` Suzuki K Poulose 2020-11-02 22:04 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 07/26] coresight: Introduce device access abstraction Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 17:14 ` Mathieu Poirier 2020-11-03 17:14 ` Mathieu Poirier 2020-11-03 17:25 ` Mathieu Poirier 2020-11-03 17:25 ` Mathieu Poirier 2020-11-04 10:07 ` Suzuki K Poulose 2020-11-04 10:07 ` Suzuki K Poulose 2020-11-09 21:00 ` Mathieu Poirier 2020-11-09 21:00 ` Mathieu Poirier 2020-11-10 9:24 ` Suzuki K Poulose 2020-11-10 9:24 ` Suzuki K Poulose 2020-11-10 17:02 ` Mathieu Poirier 2020-11-10 17:02 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 08/26] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 18:03 ` Mathieu Poirier [this message] 2020-11-03 18:03 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 09/26] coresight: Convert coresight_timeout to use " Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 18:03 ` Mathieu Poirier 2020-11-03 18:03 ` Mathieu Poirier 2020-11-04 10:42 ` Suzuki K Poulose 2020-11-04 10:42 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 10/26] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 18:36 ` Mathieu Poirier 2020-11-03 18:36 ` Mathieu Poirier 2020-11-04 10:54 ` Suzuki K Poulose 2020-11-04 10:54 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 11/26] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 12/26] coresight: etm4x: Convert all register accesses Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 18:53 ` Mathieu Poirier 2020-11-03 18:53 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 13/26] coresight: etm4x: Add commentary on the registers Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-03 19:03 ` Mathieu Poirier 2020-11-03 19:03 ` Mathieu Poirier 2020-11-03 19:04 ` Mathieu Poirier 2020-11-03 19:04 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 14/26] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-29 15:26 ` Suzuki K Poulose 2020-10-29 15:26 ` Suzuki K Poulose 2020-11-05 20:52 ` Mathieu Poirier 2020-11-05 20:52 ` Mathieu Poirier 2020-11-05 22:47 ` Suzuki K Poulose 2020-11-05 22:47 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 15/26] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 16/26] coresight: etm4x: Check for Software Lock Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-05 21:50 ` Mathieu Poirier 2020-11-05 21:50 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 17/26] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-05 21:55 ` Mathieu Poirier 2020-11-05 21:55 ` Mathieu Poirier 2020-11-09 9:40 ` Suzuki K Poulose 2020-11-09 9:40 ` Suzuki K Poulose 2020-11-09 17:42 ` Mathieu Poirier 2020-11-09 17:42 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 18/26] coresight: etm4x: Clean up " Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-06 18:52 ` Mathieu Poirier 2020-11-06 18:52 ` Mathieu Poirier 2020-11-09 9:44 ` Suzuki K Poulose 2020-11-09 9:44 ` Suzuki K Poulose 2020-11-10 23:15 ` Suzuki K Poulose 2020-11-10 23:15 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 19/26] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-06 20:34 ` Mathieu Poirier 2020-11-06 20:34 ` Mathieu Poirier 2020-11-09 9:48 ` Suzuki K Poulose 2020-11-09 9:48 ` Suzuki K Poulose 2020-11-09 17:48 ` Mathieu Poirier 2020-11-09 17:48 ` Mathieu Poirier 2020-11-06 20:46 ` Mathieu Poirier 2020-11-06 20:46 ` Mathieu Poirier 2020-11-10 10:47 ` Suzuki K Poulose 2020-11-10 10:47 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 20/26] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-06 21:11 ` Mathieu Poirier 2020-11-06 21:11 ` Mathieu Poirier 2020-11-09 9:51 ` Suzuki K Poulose 2020-11-09 9:51 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 21/26] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-06 21:42 ` Mathieu Poirier 2020-11-06 21:42 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 22/26] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-09 18:32 ` Mathieu Poirier 2020-11-09 18:32 ` Mathieu Poirier 2020-11-10 10:11 ` Suzuki K Poulose 2020-11-10 10:11 ` Suzuki K Poulose 2020-11-10 11:40 ` John Horley 2020-11-10 11:40 ` John Horley 2020-11-10 17:35 ` Mathieu Poirier 2020-11-10 17:35 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 23/26] coresight: etm4x: Detect system instructions support Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-09 20:22 ` Mathieu Poirier 2020-11-09 20:22 ` Mathieu Poirier 2020-11-10 9:31 ` Suzuki K Poulose 2020-11-10 9:31 ` Suzuki K Poulose 2020-11-10 17:33 ` Mathieu Poirier 2020-11-10 17:33 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 24/26] coresight: etm4x: Refactor probing routine Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-09 20:43 ` Mathieu Poirier 2020-11-09 20:43 ` Mathieu Poirier 2020-10-28 22:09 ` [PATCH v3 25/26] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-09 20:46 ` Mathieu Poirier 2020-11-09 20:46 ` Mathieu Poirier 2020-11-10 10:50 ` Suzuki K Poulose 2020-11-10 10:50 ` Suzuki K Poulose 2020-10-28 22:09 ` [PATCH v3 26/26] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose 2020-10-28 22:09 ` Suzuki K Poulose 2020-11-02 15:31 ` Rob Herring 2020-11-02 15:31 ` Rob Herring 2020-11-09 20:50 ` Mathieu Poirier 2020-11-09 20:50 ` Mathieu Poirier 2020-11-10 10:51 ` Suzuki K Poulose 2020-11-10 10:51 ` Suzuki K Poulose 2020-10-29 7:53 ` [PATCH v3 00/26] coresight: Support for ETM system instructions Mike Leach 2020-10-29 7:53 ` Mike Leach 2020-10-29 15:45 ` Suzuki K Poulose 2020-10-29 15:45 ` Suzuki K Poulose
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