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From: Will Deacon <will@kernel.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	freedreno@lists.freedesktop.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	dri-devel@lists.freedesktop.org,
	iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCHv8 0/8] System Cache support for GPU and required SMMU support
Date: Mon, 23 Nov 2020 15:21:47 +0000	[thread overview]
Message-ID: <20201123152146.GE11033@willie-the-truck> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> Some hardware variants contain a system cache or the last level
> cache(llc). This cache is typically a large block which is shared
> by multiple clients on the SOC. GPU uses the system cache to cache
> both the GPU data buffers(like textures) as well the SMMU pagetables.
> This helps with improved render performance as well as lower power
> consumption by reducing the bus traffic to the system memory.
> 
> The system cache architecture allows the cache to be split into slices
> which then be used by multiple SOC clients. This patch series is an
> effort to enable and use two of those slices preallocated for the GPU,
> one for the GPU data buffers and another for the GPU SMMU hardware
> pagetables.
> 
> Patch 1 - Patch 6 adds system cache support in SMMU and GPU driver.
> Patch 7 and 8 are minor cleanups for arm-smmu impl.
> 
> Changes in v8:
>  * Introduce a generic domain attribute for pagetable config (Will)
>  * Rename quirk to more generic IO_PGTABLE_QUIRK_ARM_OUTER_WBWA (Will)
>  * Move non-strict mode to use new struct domain_attr_io_pgtbl_config (Will)

Modulo some minor comments I've made, this looks good to me. What is the
plan for merging it? I can take the IOMMU parts, but patches 4-6 touch the
MSM GPU driver and I'd like to avoid conflicts with that.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	dri-devel@lists.freedesktop.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv8 0/8] System Cache support for GPU and required SMMU support
Date: Mon, 23 Nov 2020 15:21:47 +0000	[thread overview]
Message-ID: <20201123152146.GE11033@willie-the-truck> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> Some hardware variants contain a system cache or the last level
> cache(llc). This cache is typically a large block which is shared
> by multiple clients on the SOC. GPU uses the system cache to cache
> both the GPU data buffers(like textures) as well the SMMU pagetables.
> This helps with improved render performance as well as lower power
> consumption by reducing the bus traffic to the system memory.
> 
> The system cache architecture allows the cache to be split into slices
> which then be used by multiple SOC clients. This patch series is an
> effort to enable and use two of those slices preallocated for the GPU,
> one for the GPU data buffers and another for the GPU SMMU hardware
> pagetables.
> 
> Patch 1 - Patch 6 adds system cache support in SMMU and GPU driver.
> Patch 7 and 8 are minor cleanups for arm-smmu impl.
> 
> Changes in v8:
>  * Introduce a generic domain attribute for pagetable config (Will)
>  * Rename quirk to more generic IO_PGTABLE_QUIRK_ARM_OUTER_WBWA (Will)
>  * Move non-strict mode to use new struct domain_attr_io_pgtbl_config (Will)

Modulo some minor comments I've made, this looks good to me. What is the
plan for merging it? I can take the IOMMU parts, but patches 4-6 touch the
MSM GPU driver and I'd like to avoid conflicts with that.

Will
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	dri-devel@lists.freedesktop.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv8 0/8] System Cache support for GPU and required SMMU support
Date: Mon, 23 Nov 2020 15:21:47 +0000	[thread overview]
Message-ID: <20201123152146.GE11033@willie-the-truck> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> Some hardware variants contain a system cache or the last level
> cache(llc). This cache is typically a large block which is shared
> by multiple clients on the SOC. GPU uses the system cache to cache
> both the GPU data buffers(like textures) as well the SMMU pagetables.
> This helps with improved render performance as well as lower power
> consumption by reducing the bus traffic to the system memory.
> 
> The system cache architecture allows the cache to be split into slices
> which then be used by multiple SOC clients. This patch series is an
> effort to enable and use two of those slices preallocated for the GPU,
> one for the GPU data buffers and another for the GPU SMMU hardware
> pagetables.
> 
> Patch 1 - Patch 6 adds system cache support in SMMU and GPU driver.
> Patch 7 and 8 are minor cleanups for arm-smmu impl.
> 
> Changes in v8:
>  * Introduce a generic domain attribute for pagetable config (Will)
>  * Rename quirk to more generic IO_PGTABLE_QUIRK_ARM_OUTER_WBWA (Will)
>  * Move non-strict mode to use new struct domain_attr_io_pgtbl_config (Will)

Modulo some minor comments I've made, this looks good to me. What is the
plan for merging it? I can take the IOMMU parts, but patches 4-6 touch the
MSM GPU driver and I'd like to avoid conflicts with that.

Will

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	dri-devel@lists.freedesktop.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv8 0/8] System Cache support for GPU and required SMMU support
Date: Mon, 23 Nov 2020 15:21:47 +0000	[thread overview]
Message-ID: <20201123152146.GE11033@willie-the-truck> (raw)
In-Reply-To: <cover.1605621785.git.saiprakash.ranjan@codeaurora.org>

On Tue, Nov 17, 2020 at 08:00:39PM +0530, Sai Prakash Ranjan wrote:
> Some hardware variants contain a system cache or the last level
> cache(llc). This cache is typically a large block which is shared
> by multiple clients on the SOC. GPU uses the system cache to cache
> both the GPU data buffers(like textures) as well the SMMU pagetables.
> This helps with improved render performance as well as lower power
> consumption by reducing the bus traffic to the system memory.
> 
> The system cache architecture allows the cache to be split into slices
> which then be used by multiple SOC clients. This patch series is an
> effort to enable and use two of those slices preallocated for the GPU,
> one for the GPU data buffers and another for the GPU SMMU hardware
> pagetables.
> 
> Patch 1 - Patch 6 adds system cache support in SMMU and GPU driver.
> Patch 7 and 8 are minor cleanups for arm-smmu impl.
> 
> Changes in v8:
>  * Introduce a generic domain attribute for pagetable config (Will)
>  * Rename quirk to more generic IO_PGTABLE_QUIRK_ARM_OUTER_WBWA (Will)
>  * Move non-strict mode to use new struct domain_attr_io_pgtbl_config (Will)

Modulo some minor comments I've made, this looks good to me. What is the
plan for merging it? I can take the IOMMU parts, but patches 4-6 touch the
MSM GPU driver and I'd like to avoid conflicts with that.

Will
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-11-23 15:21 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 14:30 [PATCHv8 0/8] System Cache support for GPU and required SMMU support Sai Prakash Ranjan
2020-11-17 14:30 ` Sai Prakash Ranjan
2020-11-17 14:30 ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 1/8] iommu/io-pgtable-arm: Add support to use system cache Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:06   ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 15:06     ` Will Deacon
2020-11-23 16:41     ` Sai Prakash Ranjan
2020-11-23 16:41       ` Sai Prakash Ranjan
2020-11-23 16:41       ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:18   ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 15:18     ` Will Deacon
2020-11-23 16:42     ` Sai Prakash Ranjan
2020-11-23 16:42       ` Sai Prakash Ranjan
2020-11-23 16:42       ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 3/8] iommu/arm-smmu: Move non-strict mode to use domain_attr_io_pgtbl_cfg Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:19   ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 15:19     ` Will Deacon
2020-11-23 16:43     ` Sai Prakash Ranjan
2020-11-23 16:43       ` Sai Prakash Ranjan
2020-11-23 16:43       ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 4/8] drm/msm: rearrange the gpu_rmw() function Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 5/8] drm/msm/a6xx: Add support for using system cache(LLC) Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 6/8] drm/msm/a6xx: Add support for using system cache on MMU500 based targets Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 7/8] iommu: arm-smmu-impl: Use table to list QCOM implementations Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30 ` [PATCHv8 8/8] iommu: arm-smmu-impl: Add a space before open parenthesis Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-17 14:30   ` Sai Prakash Ranjan
2020-11-23 15:21 ` Will Deacon [this message]
2020-11-23 15:21   ` [PATCHv8 0/8] System Cache support for GPU and required SMMU support Will Deacon
2020-11-23 15:21   ` Will Deacon
2020-11-23 15:21   ` Will Deacon
2020-11-23 17:01   ` Sai Prakash Ranjan
2020-11-23 17:01     ` Sai Prakash Ranjan
2020-11-23 17:01     ` Sai Prakash Ranjan
2020-11-23 19:22     ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-23 19:22       ` Rob Clark
2020-11-24  4:02       ` Sai Prakash Ranjan
2020-11-24  4:02         ` Sai Prakash Ranjan
2020-11-24  4:02         ` Sai Prakash Ranjan
2020-11-24 11:10         ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 11:10           ` Will Deacon
2020-11-24 19:05           ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 19:05             ` Rob Clark
2020-11-24 21:43             ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 21:43               ` Will Deacon
2020-11-24 22:08               ` Rob Clark
2020-11-24 22:08                 ` Rob Clark
2020-11-24 22:08                 ` Rob Clark
2020-11-24 22:08                 ` Rob Clark

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